Transition-Time Optimization for Switched-Mode Dynamical Systems
标签： Transition-Time Switched-Mode Optimization Dynamical
上传时间： 2017-09-28
上传用户：xinyuzhiqiwuwu
User manual for HCSR04 Ultra sound module
上传时间： 2016-02-10
上传用户：你也睡不着吗
ADS-B接收机PCB电路板Mode-S Beast快速ADSB指南
标签： Mode-S ADS-B Beast PCB 接收机 电路板
上传时间： 2016-05-24
上传用户：gzzy2013
ucOS 的官方 User Manual
上传时间： 2016-07-27
上传用户：skyshino
MSP430*2*** user guide
标签： G2553 guide 2553 430G user MSP 430
上传时间： 2017-04-12
上传用户：shaou1
virtex ultra scale plus 16nm vcu 188 board user guide. For high speed and ultra scale design prototype.
上传时间： 2017-05-16
上传用户：hewangfeng
The General Packet Radio Service (GPRS) allows an end user to send and receive data in packet transfer mode within a public land mobile network (PLMN) without using a permanent connection between the mobile station (MS) and the external network during data transfer. This way, GPRS opti- mizes the use of network and radio resources (RRs) since, unlike circuit- switched mode, no connection between the MS and the external network is established when there is no data flow in progress. Thus, this RR optimiza- tion makes it possible for the operator to offer more attractive fees.
上传时间： 2020-05-27
上传用户：shancjb
For many years prior to the 1970s, engineers designed and built switch mode power supplies (SMPSs) using methods based largely on intuitive and exper- imentally derived techniques. In general, these power supplies were able to achieve their primary goal of high-efficiency power conversion; unfortu- nately, due to the lack of adequate theoretical analysis techniques, many of these power supplies only marginally met their desired performance require- ments. In many cases, they were considered to be unreliable.
标签： Supplies Switch Power Mode
上传时间： 2020-06-07
上传用户：shancjb
Switch-Mode Power Supply
标签： Switch-Mode Supply Power
上传时间： 2020-06-07
上传用户：shancjb
FPGA读写SD卡读取BMP图片通过LCD显示例程实验 Verilog逻辑源码Quartus工程文件+文档说明,FPGA型号Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。1 实验简介在前面的实验中我们练习了 SD 卡读写，VGA 视频显示等例程，本实验将 SD 卡里的 BMP 图片读出，写入到外部存储器，再通过 VGA、LCD 等显示。本实验如果通过液晶屏显示，需要有液晶屏模块。2 实验原理在前面的实验中我们在 VGA、LCD 上显示的是彩条，是 FPGA 内部产生的数据，本实验将彩条替换为 SD 内的 BMP 图片数据，但是 SD 卡读取速度远远不能满足显示速度的要求，只能先写入外部高速 RAM，再读出后给视频时序模块显示module top( input clk, input rst_n, input key1, output [5:0] seg_sel, output [7:0] seg_data, output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b, //vga blue output sd_ncs, //SD card chip select (SPI mode) output sd_dclk, //SD card clock output sd_mosi, //SD card controller data output input sd_miso, //SD card controller data input output sdram_clk, //sdram clock output sdram_cke, //sdram clock enable output sdram_cs_n, //sdram chip select output sdram_we_n, //sdram write enable output sdram_cas_n, //sdram column address strobe output sdram_ras_n, //sdram row address strobe output[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank address output[12:0] sdram_addr, //sdram address inout[15:0] sdram_dq //sdram data);parameter MEM_DATA_BITS = 16 ; //external memory user interface data widthparameter ADDR_BITS = 24
标签： fpga
上传时间： 2021-10-27
上传用户：
