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  • 基于AVR单片机的USB接口设计

    以AVR单片机ATmega8和USB接口器件PDIUSBD12为核心,基于标准的USB1.1协议,设计一种通用USB接口模块,以满足嵌入式系统中对USB接口的需求。对模块的硬件电路或单片机固件程序的硬件接口层稍加修改即可用于其他各种微处理器。该模块可为各种嵌入式系统增加USB接口,实现与USB主机系统通信。 Abstract:  Based on AVR microcontroller ATmega8 and USB interface chip PDIUSBD12, a general USB interface module is designed according to USB1.1 protocol for various requirements of embedded systems. Only with few modifications in circuit or hardware abstract layer of firmware, the module can be used on many Types of microprocessors. All kinds of embedded systems can realize high speed and stable communication with USB host systems, owing to the facility of this module.

    标签: AVR USB 单片机 接口设计

    上传时间: 2014-01-08

    上传用户:赵云兴

  • MPLAB C30用户指南(英文)

    MPLAB C30用户指南(英文) HIGHLIGHTSThe information covered in this chapter is as follows:• About this Guide• Recommended Reading• Troubleshooting• The Microchip Web Site• Development Systems Customer Notification Service• Customer Support Document LayoutThe document layout is as follows:• Chapter 1: Compiler Overview – describes MPLAB C30, development tools andfeature set.• Chapter 2: Differences between MPLAB C30 and ANSI C – describes thedifferences between the C language supported by MPLAB C30 syntax and thestandard ANSI-89 C.• Chapter 3: Using MPLAB C30 – describes how to use the MPLAB C30 compilerfrom the command line.• Chapter 4: MPLAB C30 Runtime Environment – describes the MPLAB C30runtime model, including information on sections, initialization, memory models, thesoftware stack and much more.• Chapter 5: Data Types – describes MPLAB C30 integer, floating point and pointerdata Types.• Chapter 6: Device Support Files – describes the MPLAB C30 header and registerdefinition files, as well as how to use with SFR’s.• Chapter 7: Interrupts – describes how to use interrupts.• Chapter 8: Mixing Assembly Language and C Modules – provides guidelines tousing MPLAB C30 with MPLAB ASM30 assembly language modules.

    标签: MPLAB C30 用户 英文

    上传时间: 2013-10-21

    上传用户:13925096126

  • 基于XGATE进行Manchester译码的方法

    Using the XGATE for Manchester DecodingTable of Contents 1 Introduction                         1.1 XGATE Module in S12X               2 Decoding Algorithm                        3 Software Implementation                   3.1 Frame Scheme                       3.2 Operating Modes and Demo             3.3 Files Summary                        3.4 Complete Mode Flowchart              4 Manchester Encoder                      4.1 Devices Used                        5 Conclusion  Appendix A Noise Elements During RF Transmissions in the Manchester Decoding ImplementationA.1 Types of Noise                      A.2 Effects of Noise                      A.3 Workaround for Noise Effects          

    标签: Manchester XGATE 译码

    上传时间: 2013-10-15

    上传用户:wqq123456

  • Using the P82B715 I2C extender

    The P82B715 I2C Buffer was designed toextend the range of the local I2C bus out to50 Meters. This application note describesthe results of testing the buffer on severaldifferent Types of cables to determine themaximum operating distances possible. Theresults are summarized in a table for easyreference.

    标签: extender P82B715 Using I2C

    上传时间: 2014-12-27

    上传用户:lou45566

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data Types of 8, 16, and 32 bits,and ßoating-point data Types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.

    标签: Bridge Memory Contr MPC

    上传时间: 2013-10-08

    上传用户:18711024007

  • Reading and Writing iButtons v

    Abstract: This application note explains the hardware of different Types of 1-Wire® interfaces and software examples adapted to this hardware with a focus on serial ports. Depending on the Types of iButtons required for a project and the type of computer to be used, the most economical interface is easily found. The hardware examples shown are basically two different Types: 5V general interface and 12V RS-232 interface. Within the 5V group a common printed circuit board could be used for all circuits described. The variations can be achieved by different populations of components. The same principal is used for the 12V RS-232 interface. The population determines if it is a Read all or a Read/Write all type of interface. There are other possible circuit implementations to create a 1-Wire interface. The circuits described in this application note cover many different configurations. For a custom application, one of the described options can be adapted to meet individual needs.

    标签: iButtons Reading Writing and

    上传时间: 2013-10-29

    上传用户:long14578

  • 3.3v看门狗芯片

    The STWD100 watchdog timer circuits are self-contained devices which prevent systemfailures that are caused by certain Types of hardware errors (non-responding peripherals,bus contention, etc.) or software errors (bad code jump, code stuck in loop, etc.).The STWD100 watchdog timer has an input, WDI, and an output, WDO (see Figure 2). Theinput is used to clear the internal watchdog timer periodically within the specified timeoutperiod, twd (see Section 3: Watchdog timing). While the system is operating correctly, itperiodically toggles the watchdog input, WDI. If the system fails, the watchdog timer is notreset, a system alert is generated and the watchdog output, WDO, is asserted (seeSection 3: Watchdog timing).The STWD100 circuit also has an enable pin, EN (see Figure 2), which can enable ordisable the watchdog functionality. The EN pin is connected to the internal pull-downresistor. The device is enabled if the EN pin is left floating.

    标签: 3.3 看门狗 芯片

    上传时间: 2013-10-22

    上传用户:taiyang250072

  • MEMS 经典教材

    The field of microelectromechanical systems (MEMS), particularly micromachinedmechanical transducers, has been expanding over recent years, and the productioncosts of these devices continue to fall. Using materials, fabrication processes, anddesign tools originally developed for the microelectronic circuits industry, newTypes of microengineered device are evolving all the time—many offering numerousadvantages over their traditional counterparts. The electrical properties of siliconhave been well understood for many years, but it is the mechanical properties thathave been exploited in many examples of MEMS. This book may seem slightlyunusual in that it has four editors. However, since we all work together in this fieldwithin the School of Electronics and Computer Science at the University of Southampton,it seemed natural to work together on a project like this. MEMS are nowappearing as part of the syllabus for both undergraduate and postgraduate coursesat many universities, and we hope that this book will complement the teaching thatis taking place in this area.

    标签: MEMS 教材

    上传时间: 2013-10-16

    上传用户:朗朗乾坤

  • State Machine Coding Styles for Synthesis

      本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine Types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.

    标签: Synthesis Machine Coding Styles

    上传时间: 2013-10-11

    上传用户:sardinescn

  • 工业系统安全问题和解决办法

    Abstract: As industrial control systems (ICSs) have become increasingly connected and use more off-the-shelfcomponents, new vulnerabilities to cyber attacks have emerged. This tutorial looks at three Types of ICSs:programmable logic controllers (PLCs), supervisory control and data acquisition (SCADA) systems, anddistributed control systems (DCSs), and then discusses security issues and remedies. This document alsoexplains the benefits and limitations of two cryptographic solutions (digital signatures and encryption) andelaborates on the reasons for using security ICs in an ICS to support cryptography.

    标签: 工业系统 安全问题

    上传时间: 2013-10-08

    上传用户:woshinimiaoye