The power of programmability gives industrial automation designers a highly efficient， cost-effective alternative to traditional motor control units （MCUs）。 The parallel-processing power， fast computational speeds， and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control （FOC）。 Additionally， Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing （DSP） that can tackle compute-intensive functions such as PID Controller， Clark/Park transforms， and Space Vector PWM. The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving， proven， motor-control reference designs. The kit also shortens the process of developing custom control capabilities， with integrated peripheral functions （Ethernet， PowerLink， and PCI® Express）， a motor-control FPGA mezzanine card （FMC） with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators， and prototyping support for evaluating alternative front-end circuitry.
上传时间： 2013-10-28
上传用户：wujijunshi
介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture i.e., the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the 8xC251SA/SB/SP/SQ microcontroller has 256-Kbyte expanded external code/data memory space and 64-Kbyte stack space. The new controller is also specially designed to execute C code efficiently. More importantly, the 8xC251SA/SB/SP/SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip data RAM options and is available in 16 Kbytes and 8 Kbytes of on-chip ROM/OTPROM or ROMless options.
标签： architecture introducin peripheral improves
上传时间： 2015-03-15
上传用户：ccclll
20世纪90年代中期，因使用ASIC实现芯片组受到启发，萌生应该将完整计算机所有不同的功能块一 次直接集成于一颗硅片上的想法。这种芯片，初始起名叫System on a Chip(SoC)，直译的中文名是 系统级芯片
标签：
上传时间： 2014-12-20
上传用户：牛布牛
Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on master and slave peripherals, such as microprocessors, memory, UART, timer, etc.
标签： Avalon Specification specification accommodate
上传时间： 2014-03-06
上传用户：pompey
The model consists of two systems, a climate control system and an electrical system. This allows for examination of the loading effects of the climate control system on the car s electrical system.
标签： system electrical consists climate
上传时间： 2015-12-24
上传用户：zhengzg
ST7529液晶驱动 The ST7529 is a driver & controller LSI for 32 gray scale graphic dot-matrix liquid crystal display systems. It generates 255 Segment and 160 Common driver circuits. This chip is connected directly to a microprocessor, accepts Serial Peripheral Interface (SPI), 8-bit/16-bit parallel or IIC display data and stores in an on-chip display data RAM. It performs display data RAM read/write operation with no external operating clock to minimize power consumption. In addition, because it contains power supply circuits necessary to drive liquid crystal, it is possible to make a display system with the fewest components.
标签： 7529 controller dot-matrix graphic
上传时间： 2013-12-02
上传用户：奇奇奔奔
数字存储器和混合信号超大规模集成电路 本书系统地介绍了数字、存储器和混合信号VLSI系统的测试和可测试性设计。该书是根据作者多年的科研成果和教学实践，结合国际上关注的最新研究热点并参考大量的文献撰写的。全书共分三个部分。第一部分是测试基础，介绍了测试基本概念、测试设备、测试经济学和故障模型。第二部分是测试方法，详细论述了组合和时序电路的测试生成、存储器测试、基于DSP和基于模块的模拟与混合信号测试、延迟测试和IDDQ测试等。第三部分是可测试性设计，包括扫描设计、BIST、边界扫描测试、模拟测试总线标准和基于IP芯核的SOC（System on a chip）测试。
上传时间： 2013-11-26
上传用户：hullow
ST7787 芯片的SPEC，比亚迪2.4inchLCM的SPEC。The ST7787 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 720 source line and 320 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial Peripheral Interface (SPI), 8-bits/9-bits/16-bits/18-bits parallel interface. Display data can be stored in the on-chip display data RAM of 240x320x18 bits. It can perform display data RAM read/write operation with no external operation clock to minimize power consumption. In addition, because of the integrated power supply circuits necessary to drive liquid crystal, it is possible to make a display system with the fewest components.
上传时间： 2016-09-22
上传用户：woshini123456
In this paper, we describe the development of a rapidly reconfigurable system in which the users’ tacit knowledge and requirements are elicited via a process of Interactive Evolution, finding the image processing parameters to achieve the required goals without any need for specialised knowledge of the machine vision system. We show that the resulting segmentation can be quickly and easily evolved from scratch, and achieves detection rates comparable to those of a hand-tuned system on a hot-rolled steel defect recognition problem.
标签： reconfigurable development the describe
上传时间： 2014-01-05
上传用户：hopy
随着微电子技术的迅猛发展，集成电路组成的电子系统集成度越来越高，使得芯片 的复杂性不断上升，单片的成本却不断降低。FPGA产品的逻辑单元越来越多，性能越 来越高，单位成本和功耗向越来越低的方向发展，使得可编程片上系统SOPC(System On Programmable Chip)设计成为必然趋势。SD存储卡因具备体积小、储容量高、可擦写、 价格低以及非易失性等特点被广泛应用于手机、数码相机、MP3播放器等领域。 美国Altera公司开发的基于SOPC技术的Nios U嵌入式处理器，是一个可变结构、 通用型的32位RISC嵌入式处理器，设计者可以非常方便地使用SOPC Builder系统开 发工具设计构造以处理器为基础的系统，针对自己的要求配置Nios II软核、Avalon总 线及外围接口系统，体现了面向用户，面向应用的SOPC技术设计思想。应用与Nios II 相关的集成开发平台和辅助开发工具，加快了NiosⅡ系统的设计与验证环节的开发速 度，对于嵌入式系统的产品开发和应用，具有广泛的价值和积极的意义。 本文介绍了基于Nios II嵌入式处理器的SOPC系统的软、硬件设计方法，结合实 验平台资源特点，构建了基于Nios II软核处理器的SD
上传时间： 2015-05-25
上传用户：wjc511
