The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) de
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) de...
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) de...
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simula...
The Torque Network Library is a networking API designed to allow developers to easily add world-clas...
VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be ...
<Floating Point Unit Core> fpupack.vhd pre_norm_addsub.vhd addsub_28.vhd post_norm_addsub....
关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in ...
Program to simulate Rayleigh fading using a p-th order autoregressive model AR(p) according to % B...
The cable compensation system is an experiment system that performs simulations of partial or microg...
解释绑定的原理,Distributed interactive simulation system/High level architrcture...
基于FPGA的I2C总线模拟,采用verilog HDL语言编写。- Based on the FPGA I2C main line simulation, uses verilog the HDL ...