Abstract: STANDARD PCB design and mounting processes can adversely influence MEMS inertial sensors.This application note contains guidelines for the layout, soldering, and mounting of MEMS inertialsensors in LGA packages in order to reduce stresses and improve functionality.
上传时间： 2014-01-15
上传用户：sjb555
AWG=American Wire Gauge STANDARD：Gauge Diam Area R I at 3A/mm2 AWGmm mm2 ohm/km mA
上传时间： 2013-11-08
上传用户：yangqian
A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry STANDARD for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
上传时间： 2013-11-05
上传用户：Wwill
With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of STANDARD instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor
上传时间： 2013-11-07
上传用户：swing
Abstract: This application note discusses a design for a phantom antenna power-supply system compatible with theDigital Satellite Equipment Control (DiSEqC) communication STANDARD, using the MAX16948 automotive dual, highvoltageLDO/switch. The presented application circuit provides a remote antenna power supply and also enables onewaycommunication from the radio head unit to the remote antenna. This system architecture offers flexibility inDiSEqC tone-burst frequency choice (100Hz to 30kHz), enabling users the ability to select the best frequency for theirapplication.
上传时间： 2013-11-17
上传用户：fnhhs
Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 STANDARD identified difficult channel conditionscharacteristic of low-frequency powerline communications and implemented an orthogonal frequency division multiplexing (OFDM)architecture using advanced modulation and channel-coding techniques. This strategy helped to ensure a robust communicationsnetwork for the smart grid.
上传时间： 2013-10-18
上传用户：myworkpost
Abstract: This article describes the Antenna Interface STANDARDs Group (AISG) STANDARD in telecommunications and details itshardware implementation. It explains how a fully integrated transceiver such as the MAX9947 can help reduce space and cost, andsolve bus arbitrations in base-station tower equipment.
上传时间： 2014-12-30
上传用户：wangchong
针对UHF读写器设计中，在符合EPC Gen2标准的情况下，对标签返回的高速数据进行正确解码以达到正确读取标签的要求，提出了一种新的在ARM平台下采用边沿捕获统计定时器数判断数据的方法，并对FM0编码进行解码。与传统的使用定时器定时采样高低电平的FM0解码方法相比，该解码方法可以减少定时器定时误差累积的影响；可以将捕获定时器数中断与数据判断解码相对分隔开，使得中断对解码影响很小，实现捕获与解码的同步。通过实验表明，这种方法提高了解码的效率，在160 Kb/s的接收速度下，读取一张标签的时间约为30次/s。 Abstract: Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 STANDARD in the design of UHF interrogator， the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level， the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding， so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding， at 160 Kb/s receiving speed， the time of the interrogator to read a tag is about 30 times/s.
上传时间： 2013-11-10
上传用户：liufei
解压密码：www.elecfans.com 随着微电子技术的迅速发展以及集成电路规模不断提高，对电路性能的设计 要求越来越严格，这势必对用于大规模集成电路设计的EDA 工具提出越来越高的 要求。自1972 年美国加利福尼亚大学柏克莱分校电机工程和计算机科学系开发 的用于集成电路性能分析的电路模拟程序SPICE（Simulation Program with IC Emphasis）诞生以来，为适应现代微电子工业的发展，各种用于集成电路设计的 电路模拟分析工具不断涌现。HSPICE 是Meta-Software 公司为集成电路设计中 的稳态分析，瞬态分析和频域分析等电路性能的模拟分析而开发的一个商业化通 用电路模拟程序，它在柏克莱的SPICE（1972 年推出），MicroSim公司的PSPICE （1984 年推出）以及其它电路分析软件的基础上，又加入了一些新的功能，经 过不断的改进，目前已被许多公司、大学和研究开发机构广泛应用。HSPICE 可 与许多主要的EDA 设计工具，诸如Candence,Workview 等兼容，能提供许多重要 的针对集成电路性能的电路仿真和设计结果。采用HSPICE 软件可以在直流到高 于100MHz 的微波频率范围内对电路作精确的仿真、分析和优化。在实际应用中， HSPICE能提供关键性的电路模拟和设计方案，并且应用HSPICE进行电路模拟时， 其电路规模仅取决于用户计算机的实际存储器容量。 The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto STANDARD HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.
上传时间： 2013-11-10
上传用户：123312
本软件是关于MAX338, MAX339的英文数据手册：MAX338, MAX339 8通道/双4通道、低泄漏、CMOS模拟多路复用器 The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions. These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-STANDARD DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.
上传时间： 2013-11-12
上传用户：18711024007
