Most circuit designers are familiar with diode dynamiccharacteristics such as charge storage, voltage dependentcapacitance and reverse recovery time. Less commonlyacknowledged and manufacturer specifi ed is diode forwardturn-on time. This parameter describes the timerequired for a diode to turn on and clamp at its forwardvoltage drop. Historically, this extremely short time, unitsof nanoseconds, has been so small that user and vendoralike have essentially ignored it. It is rarely discussed andalmost never specifi ed. Recently, switching regulator clockrate and transition time have become faster, making diodeturn-on time a critical issue. Increased clock rates aremandated to achieve smaller magnetics size; decreasedtransition times somewhat aid overall effi ciency but areprincipally needed to minimize IC heat rise. At clock speedsbeyond about 1MHz, transition time losses are the primarysource of die heating.
上传时间： 2013-10-10
上传用户：谁偷了我的麦兜
A complete design for a data acquisition card for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 processors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.
上传时间： 2013-10-29
上传用户：BOBOniu
Sensors for pressure, load, temperature, acceleration andmany other physical quantities often take the form of aWheatstone bridge. These sensors can be extremely linearand stable over time and temperature. However, mostthings in nature are only linear if you don’t bend them toomuch. In the case of a load cell, Hooke’s law states that thestrain in a material is proportional to the applied stress—as long as the stress is nowhere near the material’s yieldpoint (the “point of no return” where the material ispermanently deformed).
上传时间： 2013-11-13
上传用户：墙角有棵树
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上传时间： 2013-11-12
上传用户：pans0ul
•Founded in Jan. 08, 2001 in Shanghai, China.•Fabless IDH focused on Analog & Mixed Signal Chip design & marketing •Over 100 IC introduced.•Over 200 OEM Customer worldwide•ISO-9000 Certified•Distribution Channel in Taiwan, China & Japan To achieve 100% customer satisfactionby producing the technically advanced product with the best quality, on-time delivery and service. Leverages on proprietary process and world-class engineering team to develop innovative & high quality analog solutions that add value to electronics equipment.
标签： Circuit Analog Design Porta
上传时间： 2013-10-24
上传用户：songnanhua
使用时钟PLL的源同步系统时序分析一）回顾源同步时序计算Setup Margin = Min Clock Etch Delay – Max Data Etch Delay – Max Delay Skew – Setup TimeHold Margin = Min Data Etch Delay – Max Clock Etch Delay + Min Delay Skew + Data Rate – Hold Time下面解释以上公式中各参数的意义：Etch Delay：与常说的飞行时间(Flight Time)意义相同，其值并不是从仿真直接得到，而是通过仿真结果的后处理得来。请看下面图示：图一为实际电路，激励源从输出端，经过互连到达接收端，传输延时如图示Rmin，Rmax，Fmin，Fmax。图二为对应输出端的测试负载电路，测试负载延时如图示Rising，Falling。通过这两组值就可以计算得到Etch Delay 的最大和最小值。
上传时间： 2013-11-05
上传用户：VRMMO
AD10以上版本可能安装的问题没有这个PCB Logo Creator文件，无法加载LOGO，这个文件下载完放在AD安装目录下，然后打开软件目录DXP-Run ｓｃｒｉｐｔ然后加载里面的文件就OK了！
上传时间： 2013-11-10
上传用户：赵一霞a
此提出了一种基于Matlab／Simulink及实时代码生成工具R哪(Real．Time Workshop)的电力电子与电力传动控制系统软件的设计方法。首先在Simulink下搭建控制系统模型，进行相应仿真完善，验证控制算法，根据目标DSP型号添加相应DSP内核、外设并设置控制参数，然后直接将模型转化为相应DSP的C源代码．在相应的硬件平台支持下即可完成相关实验。
上传时间： 2013-11-04
上传用户：wincoder
高的工作电压高达100V N双N沟道MOSFET同步驱动 The D810DCDC is a synchronous step-down switching regulator controller that can directly step-down voltages from up to 100V, making it ideal for telecom and automotive applications. The D810DCDC uses a constant on-time valley current control architecture to deliver very low duty cycles with accurate cycle-by-cycle current limit, without requiring a sense resistor. A precise internal reference provides 0.5% DC accuracy. A high bandwidth (25MHz) error amplifi er provides very fast line and load transient response. Large 1Ω gate drivers allow the D810DCDC to drive multiple MOSFETs for higher current applications. The operating frequency is selected by an external resistor and is compensated for variations in VIN and can also be synchronized to an external clock for switching-noise sensitive applications. Integrated bias control generates gate drive power from the input supply during start-up and when an output shortcircuit occurs, with the addition of a small external SOT23 MOSFET. When in regulation, power is derived from the output for higher effi ciency.
上传时间： 2013-10-24
上传用户：wd450412225
Battery powered applications that have a signifi cantamount of time in standby mode, require electrical circuitsto operate with a low quiescent current to preserve batterylife. The LTC3835 synchronous step-down controlleris an excellent solution with its ultralow quiescent current(80μA). Other features make it uniquely qualifi ed tosatisfy the needs of automotive applications. A wide 4Vto 36V input voltage range protects the supply againsthigh input voltage transients and is compatible with lowvoltage cold crank conditions. The constant frequencycurrent-mode architecture with high-side inductor current
上传时间： 2013-11-20
上传用户：stewart·
