自己做的猜数字游戏， 用的是random， 很基本的一个程序
标签： 数字
上传时间： 2015-08-30
上传用户：xiaoxiang
Procedure TSPSA: begin init-of-T { T为初始温度} S={1，……，n} {S为初始值} termination=false while termination=false begin for i=1 to L do begin generate(S′form S) { 从当前回路S产生新回路S′} Δt:=f(S′))-f(S) {f(S)为路径总长} IF(Δt<0) OR (EXP(-Δt/T)>Random-of-[0,1]) S=S′ IF the-halt-condition-is-TRUE THEN termination=true End T_lower End End
标签： Procedure init-of-T TSPSA begin
上传时间： 2013-12-20
上传用户：shinesyh
It is possible that certain products which can be built using this software modules might form inventions protected by patent rights in some countries (e.g. by patents about arithmetic coding algorithms owned by IBM and AT&T in the USA). Provision of this software by the author does NOT include any licenses for any patents. In those countries where a patent license is required for certain applications of this software modules, you will have to obtain such a license yourself.
标签： possible products software certain
上传时间： 2015-09-02
上传用户：gut1234567
Secure Programming Cookbook for C and C++ is an important new resource for developers serious about writing secure code for Unix(including Linux) and Windows environments. This essential code companion covers a wide range of topics, including safe initialization, access control, input validation, symmetric and public key cryptography, cryptographic hashes and MACs, authentication and key exchange, PKI, random numbers, and anti-tampering.
标签： Programming developers for important
上传时间： 2015-09-03
上传用户：gundan
Perl & XML. by Erik T. Ray and Jason McIntosh ISBN 0-596-00205-X First Edition, published April 2002. (See the catalog page for this book.) Table of Contents Copyright Page Preface Chapter 1: Perl and XML Chapter 2: An XML Recap Chapter 3: XML Basics: Reading and Writing Chapter 4: Event Streams Chapter 5: SAX Chapter 6: Tree Processing Chapter 7: DOM Chapter 8: Beyond Trees: XPath, XSLT, and More Chapter 9: RSS, SOAP, and Other XML Applications Chapter 10: Coding Strategies Index Colophon --------------------------------------------------------------------------------
标签： T. published McIntosh Edition
上传时间： 2013-12-24
上传用户：yzhl1988
The EM Wave MATLAB Library consists of a collection of MATLAB programs related to electromagnetic wave scattering with special emphasis on wave scattering by random rough surfaces and discrete random media.
标签： MATLAB electromagnetic collection consists
上传时间： 2015-09-06
上传用户：alan-ee
使用到的参数跟谈到弹性网络的那一章里头所讲的是一样的， ke 则是终止条件。如果 step 被打勾，则程式在每一步之间会暂停 100毫秒（或其他使用者输入的数值）。如果 Random 被打勾，则程式会以系统时间作为乱数产生器的种子数，否则，就以使用者输入的数（ Random 右边那一格）为种子数。 你可以利用 load 来载入推销员问题档与其最佳解，如此便可比较弹性网络所找出来的解与最佳解差了多少。 Central, Radius, and Error 这三个参数的前两个，只影响弹性网络的起使位置和大小，对求解没有影响。第三个参数代表城市与网络点之间的容忍距离，也就是说，如果某城市与某网络点之间的距离，小于容忍距离，那就把这个城市当成是被该网络点所拜访。 按下小 w按钮会将目前的结果与参数值写到“en.out”这个档案。使得我们可以很方便地来比较不同参数的效果。
上传时间： 2013-12-17
上传用户：84425894
基于Verilog-HDL的硬件电路的实现 9.3 脉冲计数与显示 9.3.1 脉冲计数器的工作原理 9.3.2 计数模块的设计与实现 9.3.3 parameter的使用方法 9.3.4 repeat循环语句的使用方法 9.3.5 系统函数$random的使用方法 9.3.6 脉冲计数器的Verilog-HDL描述 9.3.7 特定脉冲序列的发生 9.3.8 脉冲计数器的硬件实现
标签： Verilog-HDL parameter 9.3 硬件电路
上传时间： 2013-12-14
上传用户：jeffery
This code was used for making the practical measurements in section 2.3 of my thesis. This Matlab code allows an OFDM signal to be generated based on an input data file. The data can be random data, a grey scale image, a wave file, or any type of file. The generated OFDM signal is stored as a windows wave file, allowing it to be viewed, listened to and manipulated in other programs. The modified wave file can then be decoded by the receiver software to extract the original data. This code was developed for the experiments that I performed in my honours thesis, and thus has not been fully debugged. This is the original code developed for the thesis and so has several problems with it. The BER performance given by the simulations is infact Symbol Error Rate.
标签： This measurements practical section
上传时间： 2015-09-20
上传用户：tedo811
Verilog and VHDL状态机设计，英文pdf格式 State machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in engineer. This paper will discuss a variety of issues regarding FSM design using Synopsys Design Compiler . Verilog and VHDL coding styles will be 2.0 Basic HDL coding presented. Different methodologies will be compared using real-world examples.
上传时间： 2013-12-19
上传用户：change0329
