PLL ADF4350/ADF4351单片机驱动源码,keil打开
Radio+PLL 技术资料
汇集 Radio+PLL 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
应用FPGA,采用PLL频率合成技术,设计出半整数\整数频率合成器,输出范围为1Khz-999.5Khz,步进频率可达到0.5Khz,经过验证性能很好!
The PI74SSTV16857 is a 14-bit stub-series-terminated logic (SSTL_2)registered driver with dif
adi提供adc环路滤波器的设计工具,excl表格。
锁相环PLL原理与应用教程,讲的通俗易懂
The ADAV801 and ADAV803 are stereo codecs intended for applications such as DVD or CD recorders that
This tutorials discusses the key areas of Phase Locked Loop (PLL) design, covering the main compo
Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high…
微软无线API RIL(Radio Interface Layer)库文件,这个接口文件是根据微软的专利文件和文档生成的,可以用于RIL层开发
linux FM radio driver for Siliconlab SI4703 chip,not copy, my development.