This application note describes how to implement the Bus LVDS (BLVDS) interface in the supported Altera ® device families for high-performance multipoint applications. This application note also shows the performance analysis of a multipoint application with the Cyclone III BLVDS example.
标签： Implementing LVDS 522 Bus
上传时间： 2013-10-26
上传用户：苏苏苏苏
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.
上传时间： 2013-11-24
上传用户：18707733937
PCI-PCI 桥启动时，一般需要从EEPROM 预读取配置数据。更改EEPROM中的数据一般需要专用的烧结器，这给调试过程带来不便。尤其是采用表贴封装的EEPROM。本文以Intel 公司的Dec21554PCI-PCI 桥为例，介绍一种在线读写EEPROM 的方法。EEPROM选用的是ATMEL 公司生产的AT93LC66，4Kbit，按512×8bit 组织。
上传时间： 2013-11-08
上传用户：trepb001
LVDS(低压差分信号)标准ANSI/TIA /E IA26442A22001广泛应用于许多接口器件和一些ASIC及FPGA中。文中探讨了LVDS的特点及其PCB (印制电路板)设计,纠正了某些错误认识。应用传输线理论分析了单线阻抗、双线阻抗及LVDS差分阻抗计算方法,给出了计算单线阻抗和差分阻抗的公式,通过实际计算说明了差分阻抗与单线阻抗的区别,并给出了PCB布线时的几点建议。关键词: LVDS, 阻抗分析, 阻抗计算, PCB设计 LVDS (低压差分信号)是高速、低电压、低功率、低噪声通用I/O接口标准,其低压摆幅和差分电流输出模式使EM I (电磁干扰)大大降低。由于信号输出边缘变化很快,其信号通路表现为传输线特性。因此,在用含有LVDS接口的Xilinx或Altera等公司的FP2GA及其它器件进行PCB (印制电路板)设计时,超高速PCB设计和差分信号理论就显得特别重要。
上传时间： 2013-10-31
上传用户：adada
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上传时间： 2014-01-23
上传用户：s363994250
PCI-E是一种高速传输总线形式。
上传时间： 2013-12-18
上传用户：宋桃子
PCI-1734快速安装使用手册PCI-1734快速安装使用手册PCI-1734快速安装使用手册PCI-1734快速安装使用手册PCI-1734快速安装使用手册PCI-1734快速安装使用手册PCI-1734快速安装使用手册
上传时间： 2013-10-21
上传用户：ssz1990
LVDS接口介绍，很详细
上传时间： 2013-10-28
上传用户：Jesse_嘉伟
THC63LVD103D THine LVDS芯片datasheet 规格书
上传时间： 2013-11-09
上传用户：Alick
THC63LVDM83D THine LVDS芯片datasheet 规格书
上传时间： 2015-01-03
上传用户：xiaojie
