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  • 子空间模式识别方法

    提出了一种改进的LSM-ALSM子空间模式识别方法,将LSM的旋转策略引入ALSM,使子空间之间互不关联的情况得到改善,提高了ALSM对相似样本的区分能力。讨论中以性能函数代替经验函数来确定拒识规则的参数,实现了识别率、误识率与拒识率之间的最佳平衡;通过对有限字符集的实验结果表明,LSM-ALSM算法有效地改善了分类器的识别率和可靠性。关 键 词 学习子空间; 性能函数; 散布矩阵; 最小描述长度在子空间模式识别方法中,一个线性子空间代表一个模式类别,该子空间由反映类别本质的一组特征矢量张成,分类器根据输入样本在各子空间上的投影长度将其归为相应的类别。典型的子空间算法有以下三种[1, 2]:CLAFIC(Class-feature Information Compression)算法以相关矩阵的部分特征向量来构造子空间,实现了特征信息的压缩,但对样本的利用为一次性,不能根据分类结果进行调整和学习,对样本信息的利用不充分;学习子空间方法(Leaning Subspace Method, LSM)通过旋转子空间来拉大样本所属类别与最近邻类别的距离,以此提高分类能力,但对样本的训练顺序敏感,同一样本训练的顺序不同对子空间构造的影响就不同;平均学习子空间算法(Averaged Learning Subspace Method, ALSM)是在迭代训练过程中,用错误分类的样本去调整散布矩阵,训练结果与样本输入顺序无关,所有样本平均参与训练,其不足之处是各模式的子空间之间相互独立。针对以上问题,本文提出一种改进的子空间模式识别方法。子空间模式识别的基本原理1.1 子空间的分类规则子空间模式识别方法的每一类别由一个子空间表示,子空间分类器的基本分类规则是按矢量在各子空间上的投影长度大小,将样本归类到最大长度所对应的类别,在类x()iω的子空间上投影长度的平方为()211,2,,()argmax()jMTkkjpg===Σx􀀢 (1)式中 函数称为分类函数;为子空间基矢量。两类的分类情况如图1所示。

    标签: 子空间 模式 识别方法

    上传时间: 2013-12-25

    上传用户:熊少锋

  • PL2303 USB to Serial Adapter

    The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.

    标签: Adapter Serial 2303 USB

    上传时间: 2013-11-01

    上传用户:ghostparker

  • 用单片机配置FPGA—PLD设计技巧

    用单片机配置FPGA—PLD设计技巧 Configuration/Program Method for Altera Device Configure the FLEX Device You can use any Micro-Controller to configure the FLEX device–the main idea is clocking in ONE BITof configuration data per CLOCK–start from the BIT 0􀂄The total Configuration time–e.g. 10K10 need 15K byte configuration file•calculation equation–10K10* 1.5= 15Kbyte–configuration time for the file itself•15*1024*8*clock = 122,880Clock•assume the CLOCK is 4MHz•122,880*1/4Mhz=30.72msec

    标签: FPGA PLD 用单片机 设计技巧

    上传时间: 2013-10-09

    上传用户:a67818601

  • WP151 - Xilinx FPGA的System ACE配置解决方案

    Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.

    标签: System Xilinx FPGA 151

    上传时间: 2014-12-28

    上传用户:康郎

  • WP401-FPGA设计的DO-254

    The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.

    标签: FPGA 401 254 WP

    上传时间: 2013-11-12

    上传用户:q123321

  • WP247 - Virtex-5系列高级封装

    The exacting technological demands created byincreasing bandwidth requirements have given riseto significant advances in FPGA technology thatenable engineers to successfully incorporate highspeedI/O interfaces in their designs. One aspect ofdesign that plays an increasingly important role isthat of the FPGA package. As the interfaces get fasterand wider, choosing the right package has becomeone of the key considerations for the systemdesigner.

    标签: Virtex 247 WP 高级封装

    上传时间: 2013-10-22

    上传用户:1234xhb

  • xilinx Zynq-7000 EPP产品简介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    标签: xilinx Zynq 7000 EPP

    上传时间: 2013-11-01

    上传用户:dingdingcandy

  • 通信的数学理论

    The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.

    标签: 通信

    上传时间: 2013-10-31

    上传用户:liuxinyu2016

  • CPLD和FPGA设计介绍

    Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.

    标签: CPLD FPGA

    上传时间: 2013-10-29

    上传用户:lixqiang

  • 基于FPGA的光纤光栅解调系统的研究

     波长信号的解调是实现光纤光栅传感网络的关键,基于现有的光纤光栅传感器解调方法,提出一种基于FPGA的双匹配光纤光栅解调方法,此系统是一种高速率、高精度、低成本的解调系统,并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计,综合考虑系统的解调精度和FPGA的处理速度给出了基于拉格朗日的曲线拟合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    标签: FPGA 光纤光栅 解调系统

    上传时间: 2014-07-24

    上传用户:caiguoqing