虫虫首页| 资源下载| 资源专辑| 精品软件
登录| 注册

One-Class

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    标签: master C-bus 9541 PCA

    上传时间: 2013-10-09

    上传用户:3294322651

  • PCA9544A 4channel I2C multiple

    The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.

    标签: 4channel multiple 9544A 9544

    上传时间: 2014-12-28

    上传用户:潜水的三贡

  • PCA9542A 2channel I2C bus mult

    The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.

    标签: 2channel 9542A 9542 mult

    上传时间: 2013-12-07

    上传用户:europa_lin

  • PCA9547 8 channel I2C bus mult

    The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.

    标签: channel 9547 mult PCA

    上传时间: 2014-12-28

    上传用户:270189020

  • PCA9548A 8 channel I2C bus swi

    The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.

    标签: channel 9548A 9548 PCA

    上传时间: 2013-10-13

    上传用户:bakdesec

  • PCA954X家庭的I C SMBus多路复用器与开关

    The Philips family of Multiplexers and Switches consists of bi-directional translating switches controlled via the I2C or SMBus to fan out an upstream SCL/SDA pair to 2, 4 or 8 downstream channels of SCx/SDx pairs. The Multiplexers allow only one downstream channel to be selected at a time, while the Switches allow any individual downstream channel or combination of downstream channels to be selected, depending on the content of the programmable control register. Once one or several channels have been selected, the device acts as a wire, allowing the master on the upstream channel to send commands to devices on all the active downstream channels, and devices on the active downstream channels to communicate with each other and the master. External pull-up resistors are used to pull each individual channel up to the desired voltage level. Combined interrupt output and hardware reset input are device options that are featured.

    标签: SMBus 954X PCA 954

    上传时间: 2013-10-11

    上传用户:dianxin61

  • 基于8086 CPU 的单芯片计算机系统的设计

    本文依据集成电路设计方法学,探讨了一种基于标准Intel 8086 微处理器的单芯片计算机平台的架构。研究了其与SDRAM,8255 并行接口等外围IP 的集成,并在对AMBA协议和8086 CPU分析的基础上,采用遵从AMBA传输协议的系统总线代替传统的8086 CPU三总线结构,搭建了基于8086 IP 软核的单芯片计算机系统,并实现了FPGA 功能演示。关键词:微处理器; SoC;单芯片计算机;AMBA 协议 Design of 8086 CPU Based Computer-on-a-chip System(School of Electrical Engineering and Automation, Heifei University of Technology, Hefei, 230009,China)Abstract: According to the IC design methodology, this paper discusses the design of one kind of Computer-on-a-chip system architecture, which is based on the standard Intel8086 microprocessor,investigates how to integrate the 8086 CPU and peripheral IP such as, SDRAM controller, 8255 PPI etc. Based on the analysis of the standard Intel8086 microprocessor and AMBA Specification,the Computer-on-a-chip system based on 8086 CPU which uses AMBA bus instead of traditional three-bus structure of 8086 CPU is constructed, and the FPGA hardware emulation is fulfilled.Key words: Microprocessor; SoC; Computer-on-a-chip; AMBA Specification

    标签: 8086 CPU 单芯片 计算机系统

    上传时间: 2013-12-27

    上传用户:kernor

  • 安规设计注意事项

    安规设计注意事项1. 件选用(1) 在件选用方面,要求掌握:a .安规件有哪些?(见三.安规件介绍)b.安规件要求安规件的要求就是要取得安规机构的认证或是符合相关安规标准;c.安规件额定值任何件均必须依 MANUFACTURE 规定的额定值使用;I 额定电压;II 额定电;III 温额定值;(2). 件的温升限制a. 一般电子件: 依件规格之额定温值,决定其温上限b. 线圈类: 依其绝缘系统耐温决定Class A ΔT≦75℃Class E ΔT≦90℃Class B ΔT≦95℃Class F ΔT≦115℃Class H ΔT≦140℃c. 人造橡胶或PVC 被覆之线材及电源线类:有标示耐温值 T 者ΔT≦(T-25)℃无标示耐温值 T 者ΔT≦50℃d. Bobbin 类: 无一定值,但须做125℃球压测试;e. 端子类: ΔT≦60℃f. 温升限值I. 如果有规定待测物的耐温值(Tmax),则:ΔT≦Tmax-TmraII. 如果有规定待测物的温升限值(ΔTmax),则:ΔT≦ΔTmax+25-Tmra其中 Tmra=制造商所规定的设备允许操作室温或是25℃

    标签: 安规设计 注意事项

    上传时间: 2013-10-14

    上传用户:674635689

  • Emulating a synchronous serial

    The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.

    标签: synchronous Emulating serial

    上传时间: 2014-01-31

    上传用户:z1191176801

  • 对带有uPSD3234A的DK3200的USB演示

    The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 Microcontroller Core. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementation of the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision 1.1.This application note describes a demonstration program that has been written for the DK3200 hardware demonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to work with the device, using the HID class as a ready-made device driver for the USB connection.

    标签: 3234A uPSD 3234 3200

    上传时间: 2014-04-03

    上传用户:lizhizheng88