以典型的9S08 系列为例，当你选择了一个MCU 型号后，在图1-4 右侧会显示出所有针对该型号芯片可用的项目调试场景。其中：Full Chip Simulator”是芯片全功能模拟仿真，即无需任何目标系统的硬件资源，直接在你的PC 机上模拟运行单片机的程序，在模拟运行过程中可以观察调试程序的各项控制和运行流程，分析代码运行的时间，观察各种变量，等等。CW 提供了功能强大的模拟激励功能，可以在模拟运行时模拟一些外部事件的输入，配合程序调试；P&E Multilink/Cyclone Pro”是基于P&E 公司的硬件调试工具实现实时在线硬件调试。实际就是我们经常说的BDM 调试。BDM 调试是基于芯片本身内含的在线调试功能，可实现程序下载，单步／全速运行，可以设若干个断点，可以观察和修改任意寄存器或RAM 内存空间。BDM 几乎是开发飞思卡尔8 位（9S08 和RS08 系列）、16 位（9S12 系列）和32 位（Coldfire V1 系列）单片机的标准调试模式，运用最为广泛；SofTec HCS08”是另外一家SofTec 公司提供的硬件调试工具，国内使用较少；HCS08 Serial Monitor”是基于芯片串口的监控调试开发模式。由于开发效率较低，现在几乎无人使用。
上传时间： 2013-10-10
上传用户：alex wang
The HCS12X family is the successor to the HCS12family, with many additional features. One new feature isthe increased memory available to the CPU and themethods available to access it. This document focuses onthe improved memory map configuration.
上传时间： 2013-11-13
上传用户：王者A
S51编程器制作包:自制AT89S51编程器教程AT89S51芯片的日渐流行，对我们单片机初学者来说是一个大好消息。因为做个AT89S51编程器非常容易，而且串行编程模式更便于做成在线编程器，给频繁烧片，调试带来了巨大的方便。 电路： 只要焊13根线就可以搞定这个电路。基本原理：RST置高电平，然后向单片机串行发送 编程命令。P1.7(SCK)输入移位脉冲，P1.6(MISO)串行输出，P1.5(MOSI)串行输入（要了解详细编程原理可以去看AT89S51的数据手册）。使用并口发出控制信号，74373只是用于信号转换，因为并口直接输出高电平的电压有点没到位，使用其他芯片也可以，还有人提出直接接电阻。并口引脚1控制P1.7，引脚14控制P1.5，引脚15读P1.6，引脚16控制RST，引脚17接74373 LE（锁存允许），18-25这些引脚都可以接地。建议在你的单片机系统板上做个6芯的接口。注意：被烧写的单片机一定是最小系统（单片机已经接好电源，晶振，可以运行），VCC，GND是给74373提供电源的。 还有一个方案：使用串口+单片机，这个方案已经用了半年了。电路稍微麻烦一点，速度比较快，而且可以烧AT89C51等等。其实许多器件编程原理差不多，由于我没太多时间研究器件手册，更没有MONEY买一堆芯片来测试，所以只实现了几个最常用单片机编程功能（AT89C51，C52，C55，AT89S51，S52，S53）。如果要烧写其他单片机，你可以直接编写底层控制子程序（例如，写一个单元，读一个单元，擦除ROM的子程序）。如果有需要，我可以在器件选择栏提供一个“X-CHIP”的选择，“X-CHIP”的编程细节将由用户自己去实现。当你仔细阅读器件手册后，会发现实现这些子程序其实好容易，这也是初学者学单片机编程的好课题。如果成功了会极大的提高你学单片机的积极性。 软件： 这个软件的通信，控制部分早在半年前就完成了，这回只是换了个界面和加入并口下载线的功能，希望你看到这个软件不会想吐。使用很简当，有一点特别，当你用鼠标右键点击按钮后，可以把相关操作设置为自动模式（只有打开文件，擦除芯片，写FLASH ROM，读FLASH ROM，效验数据 可以设置），点击‘自动完成’后会依次完成这些操作，并在开始时检测芯片。当“打开文件”设为自动后，第2次烧写同一个文件时不必再去打开文件，软件会自动刷新缓冲。软件在WIN XP，WIN 2000可以使用（管理员登陆的），在WIN 98 ，WIN ME使用并口模式时会更快些。这个软件同时支持串口编程器和并口下载线。操作正常结束后会有声音提示。如果没有声卡或声卡烂了，则声音会从机箱扬声器中发出。注意：记得在CMOS设置中把并口设为ECP模式。就这些东西，应该够详细吧，还有什么问题或遇到什么困难可以联系我,软件出现什么问题一定要通知我修正。祝你一次就搞定。
上传时间： 2014-01-24
上传用户：13162218709
本文介绍了一种基于单片机的健身车转速测量系统。该系统具有电路简单、使用方便等特点。文中详细介绍了该系统的工作原理,并且给出了它的硬件原理图和软件设计程序框图。关键词:转速 单片机 测量ABSTRACT :This paper introduces a measuring system of the rotational velocity of exercise bike based on single - chip microcomputer . It has such advantages : simple circuit ,convenient use and so on. The work principle is presented in detail in this paper and the block diagram of hardware and program flow chart are giv2 en as well .KEYWORDS :Rotational velocity Single - chip microcomputer Measuring
上传时间： 2013-11-02
上传用户：源弋弋
The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
上传时间： 2013-11-21
上传用户：q123321
The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register.
上传时间： 2014-12-28
上传用户：nshark
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
上传时间： 2013-10-09
上传用户：3294322651
The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.
标签： 4channel multiple 9544A 9544
上传时间： 2014-12-28
上传用户：潜水的三贡
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.
上传时间： 2013-12-07
上传用户：europa_lin
The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.
上传时间： 2014-12-28
上传用户：270189020
