This document contains a specification for a new low pin count bus interface, dubbed LPC, that will be added to future Intel chip-sets. The target audience for this document are system and component designers.
标签： specification interface document contains
上传时间： 2013-12-22
上传用户：waizhang
Ideal for large low power (nanoWatt) and connectivity applications that benefit from the availability of four serial ports: double synchronous serial ports (I² C™ and SPI™ ) and double asynchronous (LIN capable) serial ports. Large amounts of RAM memory for buffering and FLASH program memory make it ideal for instrumentation panels, TCP/IP enabled embedded applications as well as metering and industrial control and monitoring applications. While operating up to 40 MHz, it is also backward software and hardware compatible with the PIC18F8720.
标签： connectivity applications availabilit nanoWatt
上传时间： 2016-02-04
上传用户：CHINA526
Bandgap reference Voltage
上传时间： 2013-12-25
上传用户：1583060504
Designing a Low-Cost USB Mouse with the Cypress Semiconductor CY7C63000 USB Controller
标签： Semiconductor Controller Designing USB
上传时间： 2016-02-10
上传用户：亚亚娟娟123
Capturing low-level network data can be hard in Java, but it s certainly not impossible If you want to capture network packets in your Java program, you ll need a little help because no parts of the core Java APIAPI give access to low-level network
标签： impossible Capturing low-level certainly
上传时间： 2016-03-05
上传用户：yuanyuan123
the FXT library: fast transforms and low level algorithms. The package contains many algorithms for programmers: bit manipulation, fast othogonal transforms, arithmetic and number theory algorithms.
标签： algorithms transforms contains library
上传时间： 2014-01-09
上传用户：星仔
ADJUSTABLE AND +3.3 V DUAL VOLTAGE REGULATOR WITH DISABLE AND RESET FUNCTIONS
标签： ADJUSTABLE AND REGULATOR FUNCTIONS
上传时间： 2016-03-16
上传用户：gonuiln
lpc源代码verilog实现的。操作low pin count设备
上传时间： 2013-12-20
上传用户：稀世之宝039
// This program measures the voltage on an external ADC input and prints the // result to a terminal window via the UART. // // The system is clocked using the internal 24.5MHz oscillator. // Results are printed to the UART from a loop with the rate set by a delay // based on Timer 2. This loop periodically reads the ADC value from a global // variable, Result.
标签： the measures external program
上传时间： 2013-12-27
上传用户：trepb001
Fast settling-time added to the already conflicting requirements of narrow channel spacing and low phase noise lead to Fractional4 divider techniques for PLL synthesizers. We analyze discrete "beat-note spurious levels from arbitrary modulus divide sequences including those from classic accumulator methods.
标签： settling-time requirements conflicting already
上传时间： 2016-04-14
上传用户：liansi
