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  • 杰华特JW7805 datasheet

    The JW® 7805 is a low noise low-dropout (LDO)  voltage regulator with enable function that  operates from 1.8V to 5.5V. It provides up to  300mA of output current and offers low-power  operation in miniaturized packaging. JW7805  supports fixed output voltage 0.9V, 1.0V, 1.05V,  1.1V,1.2V, 1.3V, 1.35V, 1.5V, 1.8V, 1.85V, 2.1V,  2.2V, 2.3V, 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V,  3.0V,3.1V, 3.3V, 3.6V, 4.2V, 4.4V and 5.0V.  The features of low quiescent current as low as  6uA and almost zero disable current are ideal for  powering the battery equipment. JW7805’s low  output noise and high PSRR are also friendly to  RF systems.

    标签: JW7805

    上传时间: 2022-05-06

    上传用户:slq1234567890

  • 基于TMS320F28335的超声波流量计硬件原理图+软件源码

    基于TMS320F28335的超声波流量计硬件原理图+软件源码本文以TMS320F28335 处理器为核心,设计一种用于管道流量测量的超声波流量计。系统硬件由核心板,超声波发射和接收电路,切换电路,超声换能器,基于ADS805 的高速信号采集电路,人机交互以及电源等模块构成。采用时差法进行管道流量测量,时差测量采用SCOT 加权的广义互相关时延估计算法。本论文设计的超声波流量计具有测量速度快、准确性好、成本低等优点。关键字:C2000,超声波,流量,广义互相关算法AbstractA kind of ultrasonic flowmeter using for the pipe flow measurement is designed based onTMS320F28335 in this paper. The system hardware consists of the following parts: the core board,ultrasonic signal transmitter and receiver circuits, switch circuit, ultrasonic transducer, signalacquisition circuit based on ADS805, human-computer interaction module and power supplymodule, etc. The system use the method of time difference for pipeline flow measurement and thetime difference is calculated by the time-delay algorithm of SCOT weighted generalizedcross-correlation. The ultrasonic flowmeter has the features of high testing speed, high precisionand low cost, etc.Keywords: C2000,Ultrasonic, Flow, Generalized Cross-Correlation Algorithm

    标签: tms320f28335 超声波流量计

    上传时间: 2022-05-06

    上传用户:

  • CPCI标准规范中文版.pdf

    Compact PCI(Compact Peripheral Component Interconnect)简称CPCI,中文又称紧凑型PCI,是国际工业计算机制造者联合会(PCI Industrial Computer Manufacturer's Group,简称PICMG)于1994提出来的一种总线接口标准。是以PCI电气规范为标准的高性能工业用总线。为了将PCI SIG的PCI总线规范用在工业控制计算机系统,1995年11月PCI工业计算机制造者联合会(PICMG)颁布了CPCI规范1.0版,以后相继推出了PCI-PCI Bridge规范、Computer Telephony TDM规范和User-defined I/O pin assignment规范。

    标签: cpci

    上传时间: 2022-05-20

    上传用户:

  • NRF51822精简版NRF51802资料

    nRF51802 Multiprotocol Bluetooth® low energy/2.4 GHz RF System on Chip

    标签: nrf51822

    上传时间: 2022-05-22

    上传用户:ttalli

  • PNI的RM3100驱动

    美国PIN公司的RM3100芯片的驱动程序,有IIC和SPI的。

    标签: pni rm3100 驱动

    上传时间: 2022-06-01

    上传用户:shjgzh

  • DP转HDMI转换原理图

    CH7525 is a low-cost, low-power semiconductor device that translates the DisplayPort signal to HDMI/DVI. This innovative DisplayPort receiver with an integrated HDMI Transmitter is specially designed to target the notebook/ultrabook, tablet device and PC market segments. Through the CH7525’s advanced decoding / encoding algorithm, the input DisplayPort high-speed serialized multimedia data can be seamlessly converted to HDMI/DVI output.

    标签: dp hdmi

    上传时间: 2022-06-02

    上传用户:

  • 什么是MIPI接口

    摘要:随着客户要求手机摄像头像素越来越高,同时要求高的传输速度,传统的并口传输越来越受到挑战。提高并口传输的输出时钟是一个办法,但会导致系统的EMC设计变得越来困难;增加传输线手机摄像头MIPI技术介绍随着客户要求手机摄像头像素越来越高,同时要求高的传输速度,传统的并口传输越来越受到挑战。提高并口传输的输出时钟是一个办法,但会导致系统的EMC设计变得越来困难;增加传输线的位数是,但是这又不符合小型化的趋势。采用MIPI接口的模组,相较于并口具有速度快,传输数据量大,功耗低,抗干扰好的优点,越来越受到客户的青睐,并在迅速增长。例如一款同时具备MIPI和并口传输的8M的模组,8位并口传输时,需要至少11根的传输线,高达96M的输出时钟,才能达到12FPS的全像素输出;而采用MIPI接口仅需要2个通道6根传输线就可以达到在全像素下12FPS的帧率,且消耗电流会比并口传输低大概20MA。由于MIPI是采用差分信号传输的,所以在设计上需要按照差分设计的一般规则进行严格的设计,关键是需要实现差分阻抗的匹配,MIPI协议规定传输线差分阻抗值为80-125欧姆。上图是个典型的理想差分设计状态,为了保证差分阻抗,线宽和线距应该根据软件仿真进行仔细选择;为了发挥差分线的优势,差分线对内部应该紧密耦合,走线的形状需要对称,甚至过孔的位置都需要对称摆放;差分线需要等长,以免传输延迟造成误码:另外需要注意一点,为了实现紧密的耦合,差分对中间不要走地线,PIN的定义上也最好避免把接地焊盘放置在差分对之间(指的是物理上2个相邻的差分线)。

    标签: mipi 接口

    上传时间: 2022-06-02

    上传用户:

  • ICN6202规格书V10

    ICN6201/02 is a bridge chip which receives MIPI® DSI inputs and sends LVDS outputs. MIPI® DSI supports up to 4 lanes and each lane operates at 1Gbps maximum; the totally maximum input bandwidth is 4Gbps; and the MIPI defined ULPS(ultra-low-power state) is also supported. ICN6201 decodes MIPI® DSI 18bepp RGB666 and 24bpp RGB888 packets.The LVDS output 18 or 24 bits pixel with 25MHz to 154MHz, by VESA or JEIDA format.ICN6201/02 support video resolution up to FHD (1920x1080) and WUXGA (1920x1200).ICN6201 adopts QFN48 package and ICN6202 adopts QFN40 package

    标签: icn6202

    上传时间: 2022-06-10

    上传用户:kingwide

  • 高通蓝牙芯片qcc5127详细规格书datasheet.pdf

    高通蓝牙芯片qcc5127详细规格书datasheet.pdf英文版,共97页  详细说明:1   Package information(pin allocations, pios terminal functions)2   Bluetooth subsystem 3   Cystal oscillator4   System powerstates (Idel,Active,Sleep, Off)5   Host Interface subsystem6   Applications subsystem ( QSPI Flash controller)7   Audio subsystem(Dual core Kalimba, ROM, RAM and caches, Data, engine)8   Audio interfaces ( Analog, Digital, Simultaneous audio routing)9   Peripheral interfaces (PIOs, LED, USB, SPI, UART)10 Boot manager11 System manager12 example application schematic13 Electrical characteristics14 Audio performance15 Bluetooth performance16 Power consumption

    标签: 蓝牙 qcc5127

    上传时间: 2022-06-12

    上传用户:

  • 时钟芯片RX8025T

    RX-8801 SA Features built-in 32.768 kHz DTCXO, High Stability Supports l'C-Bus's high speed mode (400 kHz)Alarm interrupt function for day, date, hour, and minute settings Fixed-cycle timer interrupt function Time update interrupt function32.768 kHz output with OE function Auto correction of leap years Wide interface voltage range: 2.2 V to 5.5 V Wide time-keeping voltage range:1.8 V to 5.5 V Low current consumption: 0.84A/3V (Typ.)is an IC bus interface-compliant real-time clock which includes a 32.768 kHz DTCXO In addition to providing a calendar (year, month, date, day, hour, minute, second) function and a clock counter function, this module provides an abundance of other functions including an alarm function, fixed-cycle timer unction, time update interrupt function, and 32.768 kHz output function.The devices in this module are fabricated via a C-MOS process for low current consumption, which enables ong-term battery back-up.

    标签: 时钟芯片 rx8025t

    上传时间: 2022-06-17

    上传用户: