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Low-<b>power</b>

  • Riverside (MAXREFDES8#)3.3V Input, 12V (15V) Output Isolated Power Supply

    Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and hardware files are included.

    标签: Riverside MAXREFDES Isolated Output

    上传时间: 2013-11-16

    上传用户:会稽剑客

  • 电网现场作业管理系统的信息化设计

    为了改变目前电网现场作业管理的变电巡检、变电检修试验、输电线路巡检检修等管理系统各自独立运行,信息不能共享,功能、效率受限,建设和维护成本高的现状,提出了采用B/S+C/S构架模式,将各现场作业管理模块和生产MIS(管理系统)集成为一体的现场作业管理系统的设计方案,做到各子系统和生产MIS软硬资源共享,做到同一数据唯一入口、一处录入多处使用。各子系统设备人员等基础信息来源于生产管理系统,各子系统又是生产管理系统的作业数据、缺陷信息的重要来源。经过研究试用成功和推广应用,目前该系统已在江西电网220 kV及以上变电站全面应用。 Abstract:  In order to improve the status that the substation field inspection system, substation equipments maintenance and testing system, power-line inspection and maintenance system are running independent with each other. They can?蒺t share the resource information which accordingly constrains their functions and efficiency, and their construction and maintenance costs are high. This paper introduces a field standardized work management system based on B/S+C/S mode, integrating all field work management systems based on MIS and share the equipments and employee?蒺s data of MIS,the field work data of the sub systems are the source information of MIS, by which the same single data resouce with one-time input can be utilized in multiple places. After the research and testing, this system is triumphantly using in all 220kV and above substations in Jiangxi grid.

    标签: 电网 信息化 管理系统

    上传时间: 2013-11-15

    上传用户:han_zh

  • PCA9534 8bit I2C bus and SMBus low power IO port with interru

    The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.

    标签: interru SMBus power 9534

    上传时间: 2013-10-10

    上传用户:inwins

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    标签: Signal Input Fall Rise

    上传时间: 2013-10-23

    上传用户:copu

  • 51单片机读写u盘(含源程序和原理图)

    附件有51单片机加上sl811读写U盘的源程序和原理图 /*--------------------------------------------------------------------------AT89X52.H Header file for the low voltage Flash Atmel AT89C52 and AT89LV52.Copyright (c) 1995-1996 Keil Software, Inc.  All rights reserved.--------------------------------------------------------------------------*/ #ifndef AT89X52_HEADER_FILE#define AT89X52_HEADER_FILE 1 /*------------------------------------------------Byte Registers------------------------------------------------*/sfr P0      = 0x80;sfr SP      = 0x81;sfr DPL     = 0x82;sfr DPH     = 0x83;sfr PCON    = 0x87;sfr TCON    = 0x88;sfr TMOD    = 0x89;sfr TL0     = 0x8A;sfr TL1     = 0x8B;sfr TH0     = 0x8C;sfr TH1     = 0x8D;sfr P1      = 0x90;sfr SCON    = 0x98;sfr SBUF    = 0x99;sfr P2      = 0xA0;sfr IE      = 0xA8;sfr P3      = 0xB0;sfr IP      = 0xB8;sfr T2CON   = 0xC8;sfr T2MOD   = 0xC9;sfr RCAP2L  = 0xCA;sfr RCAP2H  = 0xCB;sfr TL2     = 0xCC;sfr TH2     = 0xCD;sfr PSW     = 0xD0;sfr ACC     = 0xE0;sfr B       = 0xF0;

    标签: 51单片机 读写 源程序 原理图

    上传时间: 2014-01-05

    上传用户:lnnn30

  • 带通滤波器设计计算

    摘 要:用一种新的思路和方法,先计算低通、再计算高通滤波器的有关参数,然后组合成带通滤波器.关键词:滤波器;参数;新思路中图分类号: TN713. 5  文献识别码:B  文章编号:1008 - 1666 (1999) 04 - 0089 - 03A New Consideration of the Band Filter’s CalculationGuo Wencheng( S hao Yang B usiness and Technology school , S haoyang , Hunan ,422000 )Abstract :This essay deals with a new method of calculating the band filters - first calculatingthe relevant parameters of low - pass filters ,then calculating the ones of high - pass filters.Key words :filter ; parameters ;new considercation八十年代后,信息产业得到了迅猛发展. 带通滤波器在微波通信、广播电视和精密仪器设备中得到了广泛应用. 带通滤波器性能的优劣,对提高接收机信噪比,防止邻近信道干扰,提高设备的技术指标,有着十分重要的意义.我在长期的教学实践中,用切比雪夫型方法设计、计算出宽带滤波器集中参数元件的数据. 该滤波器可运用在检测微波频率的仪器和其他设备中. 再将其思路和计算方法介绍给大家,供参考.

    标签: 带通滤波器设计 计算

    上传时间: 2014-12-28

    上传用户:Yukiseop

  • RT9018,RT9018AB-05 datasheet pdf

    The RT9018A/B is a high performance positive voltage regulator designed for use in applications requining very low Input voltage and very low dropout voltage at up to 3A(peak).

    标签: 9018 datasheet RT

    上传时间: 2013-10-10

    上传用户:geshaowei

  • 《数据库设计》课程设计 一、 设计目的 数据库设计是一门应用性很强的学科

    《数据库设计》课程设计 一、 设计目的 数据库设计是一门应用性很强的学科,在学习时必须使理论与实践相结合。课程设计的目的是通过实践使同学们经历到一次综合训练,以便能较全面地理解、掌握和综合运用所学的知识。 二、 设计任务与要求 (1) 对实际系统进行分析,写出需求分析说明(数据需求和事务需求)。 (2) 概念结构设计 说明本数据库将反映的现实世界中的实体、属性和它们之间的关系等(E-R图,可以用基本E-R图或扩展E-R图)。 (3) 逻辑结构设计 将概念结构映射为数据库全局逻辑结构(关系模型),包括所确定的关键字和属性、重新确定的记录结构和所建立的各个表文件之间的相互关系。 三、 设计环境与工具 要求使用辅助设计工具,如Power Designer或者ERWin等,转换为:SQL Server、Access或其它的DBMS数据库(不作统一要求)。 四、 设计步骤 参考《数据库设计实例指导书》 五、 设计题 教材P58面:3.8课程设计A、B、C任选一题 六、 设计成果 设计结果以书面形式于17周交付。 七、 成绩评定 (1) 独立完成 (2) 文档完整 (3) 满足用户需求 这是研究生数据库课程设计

    标签: 数据库设计

    上传时间: 2015-03-03

    上传用户:498732662

  • 光学设计软件zemax源码: This DLL models an nular aspheric surface as described in: "Annular surfaces in

    光学设计软件zemax源码: This DLL models an nular aspheric surface as described in: "Annular surfaces in annular field systems" By Jose M. Sasian Opt. eng. 36 (12) P 3401-3401 December 1997 This surface is essentially an odd aspheric surface with an offset in the aspheric terms. The sag is given by: Z = (c*r*r) / (1+(1-((1+k)*c*c*r*r))^ 1/2 ) + a*(r-q)^2 + b*(r-q)^3 + c*(r-q)^4 + ... Note the terms a, b, c, ... have units of length to the -1, -2, -3, ... power.

    标签: described aspheric surfaces Annular

    上传时间: 2014-01-08

    上传用户:yyyyyyyyyy

  • 通过MP(代表其中一个P口)的高4位来控制

    通过MP(代表其中一个P口)的高4位来控制,AA`BB`-4,5,6,7脚。12细分,没行数组里面分4对,每对数第一个加到P口控制电流方向,第二个数控制通电时间。正转AA`-BB`-A`A-B`B,数组由1到12行的读取,反转B`B-A`A-BB`-AA`,数组由12到1行的读取。参数POWER表示电机启动还是不启动,DIRECT参数表示方向,SPEED表示速度等级,每项通电时间用数组中的植/SPEED。本程序没考虑要走多少步的情况,调用一次就走一步。

    标签: 控制

    上传时间: 2015-12-07

    上传用户:hopy