Logic+Lock
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Cores are generated from Confluence a modern logic design language. Confluence is a simple, yet high
Cores are generated from Confluence a modern logic design language. Confluence is a simple, yet highly expressive langua...
Java Application using EJB 3.0 for renting a car - Entities : Car, User, Renting Business Logic. Ne
Java Application using EJB 3.0 for renting a car - Entities : Car, User, Renting Business Logic. Needs Glassfish v2, my...
AC motor vector control(only main code source, and it can index the method of logic implentment)
AC motor vector control(only main code source, and it can index the method of logic implentment)
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simula
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simulator may be used to m...
this program is about logic and have 4 class. for execute this program use of link list.
this program is about logic and have 4 class. for execute this program use of link list.
Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. T
Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper discusses ...
使用89S52为核心做的USB键盘,注意修改了一下windows设备描述符以及端点处理等就行了。用了一个4*4的小键盘,有0-9十个数字键, Num Lock键,Caps Lock键,Shift键,
使用89S52为核心做的USB键盘,注意修改了一下windows设备描述符以及端点处理等就行了。用了一个4*4的小键盘,有0-9十个数字键, Num Lock键,Caps Lock键,Shift键,Ctrl键,Alt键,回车键等。 最多...
Implement the step 2 of two-level logic minimization. Our goal is to find the minimum (exact minim
Implement the step 2 of two-level logic minimization. Our goal is to find the minimum (exact minimum) sum-of-products ...
The "JTAG-GDB server" is a program for integrating the ARM-Embedded ICE logic with the GNU-Debugger
The "JTAG-GDB server" is a program for integrating the ARM-Embedded ICE logic with the GNU-Debugger GDB.