This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
标签： Development Startix2 tailored Altera
上传时间： 2014-01-19
上传用户：chongcongying
This is a document of embedded system board PXA270L. the core is based on Xscale.
标签： document embedded Xscale system
上传时间： 2015-11-27
上传用户：wfeel
Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
标签： Spartan drives This perphrials
上传时间： 2014-05-29
上传用户：SimonQQ
SAMSUNG’s S3C2440A is designed to provide hand-held devices and general applications with low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2440A includes the following components.
标签： applications hand-held low-power S3C2440A
上传时间： 2013-12-18
上传用户：zhenyushaw
This document contains a general overview in the first few sections as well as a more detailed reference in later sections for SVMpython. If you re already familiar with SVMpython, it s possible to get a pretty good idea of how to use the package merely by browsing through svmstruct.py and multiclass.py. This document provides a more in depth view of how to use the package. Note that this is not a conversion of SVMstruct to Python. It is merely an embedding of Python in existing C code. All code other than the user implemented API functions is still in C, including optimization.
标签： document contains detailed overview
上传时间： 2013-12-14
上传用户：希酱大魔王
simulink real-time workshop for dragon12 development board from
标签： development real-time simulink workshop
上传时间： 2013-12-10
上传用户：yulg
General Scenarios for the Transferred Account Procedure for Data Record Format Specification Version 3 3.11.3 18 May 2006
标签： Specification Transferred Scenarios Procedure
上传时间： 2015-12-10
上传用户：iswlkje
HDMI spec 1.3 HDMI接口最新规范
上传时间： 2015-12-12
上传用户：zhaiyanzhong
An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
标签： interconnections approach general include
上传时间： 2015-12-12
上传用户：lyy1234
QFDTD90: A General 3D-FDTD Electromagnetic Simulator
标签： Electromagnetic Simulator General D-FDTD
上传时间： 2013-12-17
上传用户：luopoguixiong
