源码文件
Release 8.2i Map I.31 Xilinx Mapping Report File for Design 'decoder24' Design Information ------------------ Command Line : C:…
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源码文件
Release 8.2i Map I.31 Xilinx Mapping Report File for Design 'ClockDiv' Design Information ------------------ Command Line : C:\…
源码文件
Release 8.2i Map I.31 Xilinx Mapping Report File for Design 'DELAY_VHD' Design Information ------------------ Command Line : C:…
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Release 6.2i Map G.28 Xilinx Mapping Report File for Design 'jtd' Design Information ------------------ Command Line : C:/Xilin…
源码文件
Release 6.2i Map G.28 Xilinx Mapping Report File for Design 'lcd162' Design Information ------------------ Command Line : C:/Xi…
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Release 6.3i Map G.35 Xilinx Mapping Report File for Design 'adder4' Design Information ------------------ Command Line : D:/Xi…
源码文件
/****************************************************************************** * * LOGIC CORE: SDRAM Controller - Glo…
源码文件
Analysis & Synthesis report for pxi_dsp_da Thu Oct 11 10:42:33 2007 Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version …
源码文件
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*********…
源码文件
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*********…