prev_cmp_pxi_dsp_da.qmsg

双口RAM与PXI总线接口设计

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Web Edition " "Info: Version 7.2 Build 151 09/26/2007 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct 04 17:58:46 2007 " "Info: Processing started: Thu Oct 04 17:58:46 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off pxi_dsp_da -c pxi_dsp_da " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off pxi_dsp_da -c pxi_dsp_da" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pxi_dsp_da.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file pxi_dsp_da.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 pxi_dsp_da " "Info: Found entity 1: pxi_dsp_da" {  } { { "pxi_dsp_da.bdf" "" { Schematic "C:/quartus60/protect/RAM/pxi_dsp_da.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "pxi_dsp_da " "Info: Elaborating entity \"pxi_dsp_da\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "pxi_dsp_da " "Warning: Processing legacy GDF or BDF entity \"pxi_dsp_da\" with Max+Plus II bus and instance naming rules" {  } { { "pxi_dsp_da.bdf" "" { Schematic "C:/quartus60/protect/RAM/pxi_dsp_da.bdf" { } } }  } 0 0 "Processing legacy GDF or BDF entity \"%1!s!\" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "log_ctrl_da.bdf 1 1 " "Warning: Using design file log_ctrl_da.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 log_ctrl_da " "Info: Found entity 1: log_ctrl_da" {  } { { "log_ctrl_da.bdf" "" { Schematic "C:/quartus60/protect/RAM/log_ctrl_da.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "log_ctrl_da log_ctrl_da:inst7 " "Info: Elaborating entity \"log_ctrl_da\" for hierarchy \"log_ctrl_da:inst7\"" {  } { { "pxi_dsp_da.bdf" "inst7" { Schematic "C:/quartus60/protect/RAM/pxi_dsp_da.bdf" { { -104 32 152 24 "inst7" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WGDFX_PROCESSING_LEGACY_SCHEMATIC_WITH_MAXPLUS_II_NAMING" "log_ctrl_da " "Warning: Processing legacy GDF or BDF entity \"log_ctrl_da\" with Max+Plus II bus and instance naming rules" {  } { { "log_ctrl_da.bdf" "" { Schematic "C:/quartus60/protect/RAM/log_ctrl_da.bdf" { } } }  } 0 0 "Processing legacy GDF or BDF entity \"%1!s!\" with Max+Plus II bus and instance naming rules" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "CNT12.vhd 2 1 " "Warning: Using design file CNT12.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 CNT12-behav " "Info: Found design unit 1: CNT12-behav" {  } { { "CNT12.vhd" "" { Text "C:/quartus60/protect/RAM/CNT12.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 CNT12 " "Info: Found entity 1: CNT12" {  } { { "CNT12.vhd" "" { Text "C:/quartus60/protect/RAM/CNT12.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CNT12 CNT12:inst2 " "Info: Elaborating entity \"CNT12\" for hierarchy \"CNT12:inst2\"" {  } { { "pxi_dsp_da.bdf" "inst2" { Schematic "C:/quartus60/protect/RAM/pxi_dsp_da.bdf" { { 64 128 248 192 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "ram_da.vhd 2 1 " "Warning: Using design file ram_da.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ram_da-SYN " "Info: Found design unit 1: ram_da-SYN" {  } { { "ram_da.vhd" "" { Text "C:/quartus60/protect/RAM/ram_da.vhd" 56 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ram_da " "Info: Found entity 1: ram_da" {  } { { "ram_da.vhd" "" { Text "C:/quartus60/protect/RAM/ram_da.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ram_da ram_da:inst6 " "Info: Elaborating entity \"ram_da\" for hierarchy \"ram_da:inst6\"" {  } { { "pxi_dsp_da.bdf" "inst6" { Schematic "C:/quartus60/protect/RAM/pxi_dsp_da.bdf" { { 16 376 632 176 "inst6" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../altera/72/quartus/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../../altera/72/quartus/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 435 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram ram_da:inst6\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"ram_da:inst6\|altsyncram:altsyncram_component\"" {  } { { "ram_da.vhd" "altsyncram_component" { Text "C:/quartus60/protect/RAM/ram_da.vhd" 97 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "ram_da:inst6\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"ram_da:inst6\|altsyncram:altsyncram_component\"" {  } { { "ram_da.vhd" "" { Text "C:/quartus60/protect/RAM/ram_da.vhd" 97 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_mrg1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mrg1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_mrg1 " "Info: Found entity 1: altsyncram_mrg1" {  } { { "db/altsyncram_mrg1.tdf" "" { Text "C:/quartus60/protect/RAM/db/altsyncram_mrg1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_mrg1 ram_da:inst6\|altsyncram:altsyncram_component\|altsyncram_mrg1:auto_generated " "Info: Elaborating entity \"altsyncram_mrg1\" for hierarchy \"ram_da:inst6\|altsyncram:altsyncram_component\|altsyncram_mrg1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "ram2.vhd 2 1 " "Warning: Using design file ram2.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ram2-SYN " "Info: Found design unit 1: ram2-SYN" {  } { { "ram2.vhd" "" { Text "C:/quartus60/protect/RAM/ram2.vhd" 60 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ram2 " "Info: Found entity 1: ram2" {  } { { "ram2.vhd" "" { Text "C:/quartus60/protect/RAM/ram2.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}