This example demonstrates how the C8051F06x SMBus interface can communicate // with a 256 byte I2C Serial EEPROM (Microchip 24LC02B). // - Interrupt-driven SMBus implementation // - Only master states defined (no slave or arbitration) // - Timer4 used by SMBus for SCL low timeout detection // - SCL frequency defined by <SMB_FREQUENCY> constant
标签： demonstrates communicate C8051F06x interface
上传时间： 2016-04-12
上传用户：hanli8870
WIN CE Draw 2D GRAPHIC EXAMPLE BASED ON VS2005 SMART DEVICE
标签： GRAPHIC EXAMPLE DEVICE BASED
上传时间： 2014-03-07
上传用户：lvzhr
WINCE 6 , TEXT EXAMPLE, VS2005
上传时间： 2016-04-15
上传用户：yuchunhai1990
wince 6 dilag example based on vs2005
上传时间： 2014-07-24
上传用户：ljt101007
learn to use eclipse by example
上传时间： 2014-01-03
上传用户：baitouyu
针对ti c6713 dsk的flashburn烧写程序，已通过测试
上传时间： 2013-12-25
上传用户：wanghui2438
This example describes how to use the ADC and DMA to transfer continuously converted data from ADC to a data buffer. The ADC is configured to converts continuously ADC channel14. Each time an end of conversion occurs the DMA transfers, in circular mode, the converted data from ADC1 DR register to the ADC_ConvertedValue variable. The ADC1 clock is set to 14 MHz.
标签： continuously ADC describes converted
上传时间： 2014-01-03
上传用户：徐孺
This example provides a description of how to set a communication with the bxCAN in loopback mode: - transmit and receive a standard data frame by polling at 100Kbit/S - transmit and receive an extended data frame with interrupt at 500Kbit/S - lit some LEDs depending of the program succeed or not
标签： communication description provides loopback
上传时间： 2016-04-24
上传用户：frank1234
This example shows how to use CortexM3 Bit-Band access to perform atomic read-modify-write and read operations on a varaible in SRAM.
标签： read-modify-write CortexM3 Bit-Band example
上传时间： 2013-12-23
上传用户：1427796291
This example provides a description of how to use a DMA channel to transfer a word data buffer from memory (Flash) to memory (RAM). The dedicated DMA channel is configured to transfer once a time a 32 word data buffer stored as constant in the Flash memory to another buffer in the RAM memory. The received data are stored in the DST_Buffer. The DMA channel transfer complete interrupt is enabled to generate an interrupt at the end of the buffer transfer. As soon as the transfer is completed an interrupt is generated and in the DMA channel interrupt routine the transfer complete interrupt pending bit is cleared. The data counter is stored before and after the transfer to show that all data has been transfered. TransferStatus gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED
标签： description provides transfer example
上传时间： 2016-04-24
上传用户：ecooo
