SD 2.0 Memory Controller SD Bus Interface SD Controller Logic NAND Flash Controller
SD 2.0 Memory Controller SD Bus Interface SD Controller Logic NAND Flash Controller
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SD 2.0 Memory Controller SD Bus Interface SD Controller Logic NAND Flash Controller
CAN-bus规范(Version 2.0)·CAN2.0A:CAN标准报文格式·CAN2.0B:CAN标准报文格式和扩展报文格式CAN-bus国际标准ISO 11898注意:·CAN-bus底层协议只定义物理层、数据键堵层。·CAN2.0...
The PCA9674/74A is a drop-in upgrade for the PCF8574/74A providing higher Fast-modePlus I2C-b
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-
The PCA9535 and PCA9535C are 24-pin CMOS devices that provide 16 bits of GeneralPurpose paral
资料->【B】电子技术->【B5】通信技术->【1】通信协议->【USB、OTG】->Universal Serial Bus Content Security Method 2 USB Digital Transmission Conte...
The CMUPA is designed to be a low bandwidth, highly flexible architecture .This is it s protocol.
ARM System-on-Chip Architecture經典之書。學習ARM架構的好書。
This application note describes the HUI architecture of the EZ-USB FX1, the full speed PIZDA microcontroller
This is a source code of 256 point fft architecture. This code is also available with opencores