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Blocks

  • ET++ is a portable and homogenous object-oriented class library integrating user interface building

    ET++ is a portable and homogenous object-oriented class library integrating user interface building Blocks, basic data structures, and high level application framework components. ET++ eases the building of highly interactive applications with consistent user interfaces following the direct manipulation principle. The ET++ class library is implemented in C++ and can be used on several operating systems and window system platforms. Since its initial conception the class library has been continuously redesigned and improved. It started with an architecture which was close to MacApp. During several iterations a new and unique architecture evolved. A byproduct of the ET++ project is a set of tools, which were designed to support the exploration of ET++ applications at run-time. 设计模式一书引用的主要参考例程,一个跨平台的应用框架,基于C++实现,是学习面向对象的经典源码.

    标签: object-oriented integrating homogenous interface

    上传时间: 2016-04-15

    上传用户:tedo811

  • This model simulates a six-degrees-of-freedom variable mass equations of motion with Simulink and Ae

    This model simulates a six-degrees-of-freedom variable mass equations of motion with Simulink and Aerospace Blockset. This model has been color coded to aid in locating Aerospace Blockset Blocks. The red Blocks are Aerospace Blockset Blocks, the orange Blocks are subsystems containing additional Aerospace Blockset Blocks and the white Blocks are Simulink Blocks.

    标签: six-degrees-of-freedom equations simulates Simulink

    上传时间: 2013-12-26

    上传用户:大融融rr

  • This directory builds the miniport driver for Adaptec’s 1540 family of SCSI controllers. This driver

    This directory builds the miniport driver for Adaptec’s 1540 family of SCSI controllers. This driver exports several functions which are used by SCSIPORT.SYS to issue SCSI requests to the devices attached to the controller, process adapter interrupts, and various other SCSI activities. This driver is also responsible for detecting non-Plug and Play 1540 SCSI controllers—the Plug and Play controllers are detected by the operating system—and for shutting down the controller during device removal or power management operations. This sample also demonstrates the use of the SCSIWMI library to add WMI functionality to SCSI miniports. This library can be linked into a miniport and provides most of the framework needed to expose WMI data Blocks to SCSIPORT and the system.

    标签: driver This controllers directory

    上传时间: 2016-06-28

    上传用户:caiiicc

  • Program main BIOS image | | /B - Program Boot Block | | /N - Program NVRAM | | /C - Destroy CM

    Program main BIOS image | | /B - Program Boot Block | | /N - Program NVRAM | | /C - Destroy CMOS checksum | | /E - Program Embedded Controller Block | | /K - Program all non-critical Blocks | | /Kn - Program n th non-critical block only(n=0-7) | | /Q - Silent execution | | /REBOOT - Reboot after programming | | /X - Don t Check ROM ID | | /S - Display current system s ROMID | | /Ln - Load CMOS defaults

    标签: Program Destroy Block NVRAM

    上传时间: 2016-07-26

    上传用户:wfl_yy

  • 1.对染噪doppler信号进行小波包3层分解:分解层次j=1,2时

    1.对染噪doppler信号进行小波包3层分解:分解层次j=1,2时,都是信号的概貌;当j=3时,反映概貌的已几乎不含噪声分量,而其它噪声分量的幅值已很小。 2.对加噪Blocks信号进行不同阈值及不同阈值的使用方式降噪。

    标签: doppler 分解 信号

    上传时间: 2016-08-08

    上传用户:thesk123

  • The widespread use of embedded systems mandates the development of industrial software design method

    The widespread use of embedded systems mandates the development of industrial software design methods, i.e. computer-aided design and engineering of embedded applications using formal models (frameworks) and standardized prefabricated components, much in the same way as in other mature areas of engineering such as mechanical engineering and electronics. These guidelines have been used to develop Component-based Design of Software for Embedded Systems (COMDES). The paper gives an overview of the COMDES framework, followed by a presentation of a generic component types, such as function Blocks, activities and function units. The execution of function units is discussed in the context of a newly developed execution model, i.e. timed-multitasking, which has been extended to distributed embedded systems.

    标签: development widespread industrial embedded

    上传时间: 2014-01-23

    上传用户:z754970244

  • This demo shows the BER performance of linear, decision feedback (DFE), and maximum likelihood seque

    This demo shows the BER performance of linear, decision feedback (DFE), and maximum likelihood sequence estimation (MLSE) equalizers when operating in a static channel with a deep null. The MLSE equalizer is invoked first with perfect channel knowledge, then with an imperfect, although straightforward, channel estimation algorithm. The BER results are determined through Monte Carlo simulation. The demo shows how to use these equalizers seamlessly across multiple Blocks of data, where equalizer state must be maintained between data Blocks.

    标签: performance likelihood decision feedback

    上传时间: 2013-11-25

    上传用户:1079836864

  • A novel met hod t o p artially compensate sigma2delta shap ed noise is p rop osed. By injecting t he

    A novel met hod t o p artially compensate sigma2delta shap ed noise is p rop osed. By injecting t he comp en2 sation cur rent int o t he p assive loop f ilte r during t he delay time of t he p hase f requency detect or ( PFD) , a maximum reduction of t he p hase noise by about 16dB can be achieved. Comp a red t o ot he r compensation met hods , t he tech2 nique p rop osed he re is relatively simple and easy t o implement . Key building Blocks f or realizing t he noise cancel2 lation , including t he delay va riable PFD and comp ensation cur rent source , a re sp ecially designed. Bot h t he behavior level and circuit level simulation results a re p resented.

    标签: sigma2delta compensate injecting artially

    上传时间: 2013-12-18

    上传用户:qlpqlq

  • Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports –

    Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports – Data Types – Assigning Values and Numbers – Operators – Behavioral Modeling • Continuous Assignments • Procedural Blocks – Structural Modeling n Summary: Verilog Environment

    标签: Verilog Components Structure Overview

    上传时间: 2017-02-17

    上传用户:xinyuzhiqiwuwu

  • In this paper, we propose a hierarchical clustering method using visual, textual and link analysis

    In this paper, we propose a hierarchical clustering method using visual, textual and link analysis. By using a vision-based page segmentation algorithm, a web page is partitioned into Blocks, and the textual and link information of an image can be accurately extracted from the block containing that image.

    标签: hierarchical clustering analysis propose

    上传时间: 2014-01-07

    上传用户:xiaoxiang