代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/277196/10655142
prj i2c_master_top.prj
verilog work i2c_master_bit_ctrl.v
verilog work i2c_master_byte_ctrl.v
verilog work i2c_master_top.v
www.eeworm.com/read/350770/10711743
f ping_tb.f
/***********************************************************************
File: ping_tb.f
Rev: 3.0.0
This file contains the input arguments for the Verilog simulator.
Copyright (c) 200
www.eeworm.com/read/276511/10733100
voptmmr6nz
library verilog;
use verilog.vl_types.all;
entity DPLL is
port(
clock : in vl_logic;
reset : in vl_logic;
Fin : in vl_logic;
www.eeworm.com/read/276507/10733331
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity rom is
port(
aclr : in vl_logic;
address : in vl_logic_vector(7 downto 0);
clock : in
www.eeworm.com/read/349305/10836678
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity Reset_Delay is
port(
iCLK : in vl_logic;
oRESET : out vl_logic
);
end Reset_Delay;
www.eeworm.com/read/349305/10836708
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity SEG7_LUT_4 is
port(
oSEG0 : out vl_logic_vector(6 downto 0);
oSEG1 : out vl_logic_vector(6 downto 0);
www.eeworm.com/read/349305/10836716
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity SRAM_16Bit_512K is
port(
oDATA : out vl_logic_vector(15 downto 0);
iDATA : in vl_logic_vector(15 downto
www.eeworm.com/read/349103/10852129
scr read.scr
read -format vhdl verilog/new/ALARM_BLOCK.vhd
read -format vhdl verilog/new/ALARM_SM_2.vhd
read -format vhdl verilog/new/CLOCK_GEN.vhd
read -format vhdl verilog/new/COMPARATOR.vhd
read -format vhdl ve
www.eeworm.com/read/273960/10892962
qmsg pulse_16_sum.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Qua
www.eeworm.com/read/418434/10945740
hif led.hif
Version 8.0 Build 215 05/29/2008 SJ Full Version
11
945
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths