代码搜索：verilog hdl 是什么？
找到约 10,000 项符合「verilog hdl 是什么？」的源代码
代码结果 10,000
www.eeworm.com/read/159314/5585159
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufd is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
www.eeworm.com/read/159314/5585162
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity decode1_io is
port(
o : out vl_logic;
i : in vl_logic
);
end decode1_io;
www.eeworm.com/read/159314/5585181
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufs_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
www.eeworm.com/read/159314/5585215
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity jtagppc is
port(
tck : out vl_logic;
tdippc : out vl_logic;
tms : out vl_logic;
www.eeworm.com/read/159314/5585276
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufndn is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
www.eeworm.com/read/159314/5585295
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufsn is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
www.eeworm.com/read/159314/5585340
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity timespec is
generic(
cds_action : string := "ignore"
);
end timespec;
www.eeworm.com/read/159314/5585378
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufns is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic
www.eeworm.com/read/159314/5585470
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity tblock is
generic(
cds_action : string := "ignore"
);
end tblock;
www.eeworm.com/read/159314/5585505
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity iobufd_24 is
port(
o : out vl_logic;
io : inout vl_logic;
i : in vl_logic