代码搜索:uart_TEST

找到约 332 项符合「uart_TEST」的源代码

代码结果 332
www.eeworm.com/read/382366/9032835

plg uart_test.plg

礦ision3 Build Log Project: C:\Documents and Settings\Administrator\桌面\S3CEV40移植\Uart_Test\project\Uart_Test.uv2 Project File Date: 09/02/2008 Output
www.eeworm.com/read/382366/9032859

plg uart_test.plg

礦ision3 Build Log Project: C:\Documents and Settings\Administrator\桌面\S3CEV40移植\Uart_Test\project\Uart_Test.uv2 Project File Date: 09/02/2008 Output
www.eeworm.com/read/381474/9090620

vhd _primary.vhd

library verilog; use verilog.vl_types.all; entity Uart_test is generic( clkvar : integer := 10 ); end Uart_test;
www.eeworm.com/read/281908/9127454

c main.c

#include "stdio.h" #include "davincievm.h" extern void uart_test(); /* ------------------------------------------------------------------------ * *
www.eeworm.com/read/360274/10105053

opt uart_test.opt

### uVision2 Project, (C) Keil Software ### Do not modify ! cExt (*.c) aExt (*.s*; *.src; *.a*) oExt (*.obj) lExt (*.lib) tExt (*.txt; *.h; *.inc) pExt (*.plm) CppX (*.cpp) DaveTm {
www.eeworm.com/read/360274/10105055

uv2 uart_test.uv2

### uVision2 Project, (C) Keil Software ### Do not modify ! Target (uart_test), 0x0004 // Tools: 'ARM-ADS' Group (Startup Code) Group (Syatem Calls) Group (Source) Group (Documents) File
www.eeworm.com/read/355795/10243958

txt readme.txt

运行步骤: 1 打开uart.mcp工程文件 2 运行 3 按照屏幕提示,任意输入字符,观察屏幕输出,并思考数据流动方向和原理 文件说明: uart_test.c 开发板初始化文件 uart0.c 串口0实验主程序文件
www.eeworm.com/read/424889/10403149

srr uart_test.srr

#Build: Synplify 8.6.2H, Build 017R, Dec 7 2006 #install: D:\Actel\Libero7.3\Synplify\Synplify_862H #OS: Windows XP 5.1 #Hostname: LIUYINHUA #Mon Apr 16 08:47:58 2007 $ Start of Compile #Mo
www.eeworm.com/read/424889/10403221

v uart_test.v

/********************uart_test************************* **模块名称:uart_test **功能描述:uart的测试顶层模块 **************************************************/ module uart_test( clock, //系统时钟 RXD,TX
www.eeworm.com/read/424889/10403239

log designer.log

Imported the files: C:\Actelprj\ProASIC3\UART\synthesis\uart_test.edn C:\Actelprj\ProASIC3\UART\synthesis\uart_test_sdc.sdc The Import command succeeded ( 00:00:05 ) The design C:\Actelprj