代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/135419/13934288
lib sap1.lib
[PROM]
A/PROM=22|.\src\prom.v|17|1*13317
B/PROM=3*61916
R=.\src\prom.v|17
[SAP_1]
A/SAP_1=22|.\src\SAP_1.v|28|1*14998
B/SAP_1=3*65668
R=.\src\SAP_1.v|28
[SAP_1_tb]
A/SAP_1_tb=22|.\src\Tes
www.eeworm.com/read/163678/10150853
h hier_chan.h
#ifndef HIER_CHAN_H
#define HIER_CHAN_H
//BEGIN hier_chan.h
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// DESCRIPTION
// This design contains two examples of cus
www.eeworm.com/read/388090/8636448
vhd cordic_tst.vhd
-- VHDL Test Bench Created from source file sc_corproc.vhd -- 12/07/06 11:47:39
--
-- Notes:
-- 1) This testbench template has been automatically generated using types
-- std_logic and std_logic_vec
www.eeworm.com/read/384728/8849010
vhd 56_vhdl.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
library STD;
library WORK;
use STD.STANDARD.ALL;
use WORK.ALL;
entity test_prefetch is
end t
www.eeworm.com/read/384728/8849510
vhd 33_comparer.vhd
-- Author : yzf
-- Created On: Thu Dec 21 09:46:16 1995
-- Testbench for comp.comp
library STD;
library WORK;
--library comp;
use STD.STANDARD.ALL;
--use COMP.TYPES.ALL;
use WORK.TYPES.
www.eeworm.com/read/383505/8941182
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity testbench is
generic(
width : integer := 16
);
end testbench;
www.eeworm.com/read/284185/8955720
vhd 56_vhdl.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
library STD;
library WORK;
use STD.STANDARD.ALL;
use WORK.ALL;
entity test_prefetch is
end t
www.eeworm.com/read/284185/8956266
vhd 33_comparer.vhd
-- Author : yzf
-- Created On: Thu Dec 21 09:46:16 1995
-- Testbench for comp.comp
library STD;
library WORK;
--library comp;
use STD.STANDARD.ALL;
--use COMP.TYPES.ALL;
use WORK.TYPES.
www.eeworm.com/read/182649/9198048
readme
FPU Notes
---------
1) The FPU will never generate a SNAN output
1a) The SNAN output is asserted when one of the operands
was a signaling NAN (output will be a quiet NAN).
1b) The QNAN output is
www.eeworm.com/read/366183/9825882
vhd 56_vhdl.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
library STD;
library WORK;
use STD.STANDARD.ALL;
use WORK.ALL;
entity test_prefetch is
end t