sap1.lib

這是用verilog寫的一個簡單的處理器

[PROM]
A/PROM=22|.\src\prom.v|17|1*13317
B/PROM=3*61916
R=.\src\prom.v|17

[SAP_1]
A/SAP_1=22|.\src\SAP_1.v|28|1*14998
B/SAP_1=3*65668
R=.\src\SAP_1.v|28

[SAP_1_tb]
A/SAP_1_tb=22|.\src\TestBench\SAP_1_TB.v|9|1*19867
B/SAP_1_tb=3*94382
R=.\src\TestBench\SAP_1_TB.v|9

[~A]
ModifyID=201
Version=73

[~MFT]
0=5|0.mgf|4350|0
1=10|1.mgf|19867|13317
3=10|3.mgf|94382|61916

[~U]
PROM=12|0*3978||16
SAP_1=12|0*4134||16
SAP_1_tb=12|0*4350||16