代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
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dsp testbench.dsp
# Microsoft Developer Studio Project File - Name="TestBench" - Package Owner=
# Microsoft Developer Studio Generated Build File, Format Version 6.00
# ** DO NOT EDIT **
# TARGTYPE "Win32 (x86)
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aps testbench.aps
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h testbench.h
// TestBench.h : main header file for the TESTBENCH application
//
#if !defined(AFX_TESTBENCH_H__64CA51E9_D71D_48A7_BED8_7FA541FDDCD5__INCLUDED_)
#define AFX_TESTBENCH_H__64CA51E9_D71D_48A7_BED8_
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clw testbench.clw
; CLW file contains information for the MFC ClassWizard
[General Info]
Version=1
LastClass=CMainFrame
LastTemplate=CDialog
NewFileInclude1=#include "stdafx.h"
NewFileInclude2=#include "TestBen
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plg testbench.plg
Build Log
--------------------Configuration: NetTS - Win32 Debug--------------------
Command Lines
Creating temporary file "C:\DOCUME~1\wang\LO
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v testbench.v
/******************************************************************************
**
** Xilinx, Inc. 2002 www.xilinx.com
**
** XAPP 266 - Synthesizable FCRAM Controller
**
************
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v testbench.v
module dadda_test();
reg [5:0] a,b;
wire [11:0] prod;
wire [7:0] c0,c1,c2,c3,c4,c5,c6,c7,c8,c9,c10,c11;
dadda instance(a,b,s,c0,c1,c2,c3,c4,c5,c6,c7,c8,c9,c10,c11);
initial
begin
a=54;
b
www.eeworm.com/read/468753/6987521
v~ testbench.v~
module test_arm();
reg GCLK;
reg nRESET;
reg BIGEND;
reg [1:0] CHSD, CHSE;
wire LATECANCEL, PASS;
wire [4:0] InM;
arm7 My_Arm7(nOPC, nCPI, CPA, CPB, sysclk, nRESET, nFIQ, nIRQ, ABORT,nMREQ, nRW, MA
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v testbench.v
module test_arm();
reg GCLK;
reg nRESET;
reg BIGEND;
reg [1:0] CHSD, CHSE;
wire LATECANCEL, PASS;
wire [4:0] InM;
arm7 My_Arm7( .nOPC(), .nCPI(), .CPA(), .CPB(), .sysclk(GCLK), .nRESET(nRESET), .nF
www.eeworm.com/read/466960/7025569
v testbench.v
`timescale 10ns/1ns
module testbench;
reg RESET, ALARM,CLK,HRS,MINS,SET_TIME,TOGGLE_SWITCH;
wire [9:0] OUTBUS;
wire AM_PM_SHOW,SPEAKER_OUT;
TOP top(CLK,ALARM,HRS,MINS,SET_TIME,RESET,TOGGLE_SWIT