代码搜索：testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/32161/1032457
v mult16.v
// **** Here's a simple, sequential multiplier. Very simple, unsigned..
// Not very well tested, play with testbench, use at your own risk, blah blah blah..
//
//
// Unsigned 16-bit multiply (m
www.eeworm.com/read/38898/1117585
v mult16.v
// **** Here's a simple, sequential multiplier. Very simple, unsigned..
// Not very well tested, play with testbench, use at your own risk, blah blah blah..
//
//
// Unsigned 16-bit multiply (m
www.eeworm.com/read/434670/1868873
vhd micro_slave_tb.vhd
-- micro_slave_tb.vhd
--
-- Created: 6/3/99 ALS
-- This file emulates the uC that interfaces to the I2C design. This testbench
-- will interface to an instantiation of the I2C design and configure
www.eeworm.com/read/358447/2985795
vhd synth_test.vhd
--TESTBENCH FOR THE ENTIRE PROCESSOR. FOR SYNTHESIS THIS FILE WITHOUT
-- THE STIMULUS PART IS GIVEN AS THE TOP LEVEL ENTITY.
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.
www.eeworm.com/read/358447/2985815
vhd synth_test.vhd
--TESTBENCH FOR THE ENTIRE PROCESSOR. FOR SYNTHESIS THIS FILE WITHOUT
-- THE STIMULUS PART IS GIVEN AS THE TOP LEVEL ENTITY.
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.
www.eeworm.com/read/471537/6884742
vhd synth_test.vhd
--TESTBENCH FOR THE ENTIRE PROCESSOR. FOR SYNTHESIS THIS FILE WITHOUT
-- THE STIMULUS PART IS GIVEN AS THE TOP LEVEL ENTITY.
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.
www.eeworm.com/read/368409/9697033
tf ram16x8sng_tb.tf
module testbench();
// Inputs
reg clk;
reg we;
reg [3:0] ADDR;
reg [7:0] Din;
// Outputs
wire [7:0] Dout;
// Instantiate the UUT
RAM16x8sng uut (
www.eeworm.com/read/368409/9697045
tf counter_simtb.tf
module testbench();
// DATE: Mon Apr 28 15:26:36 2003
// TITLE:
// MODULE: counter_sim
// DESIGN: counter_sim
// FILENAME: counter_sim
// PROJECT: counter_sim
// VERSION: V
www.eeworm.com/read/414314/11121181
txt readme.txt
archive content:
ASM/
- example programs.
- simulator.
- include file for smal.
- smal.exe - see license for smal !
VHDL/
- VHDL source of CPU.
- VHDL testbench.
- Memory files.
-
www.eeworm.com/read/412583/11191247
vhd synth_test.vhd
--TESTBENCH FOR THE ENTIRE PROCESSOR. FOR SYNTHESIS THIS FILE WITHOUT
-- THE STIMULUS PART IS GIVEN AS THE TOP LEVEL ENTITY.
library ieee ;
use ieee.std_logic_1164.all ;
use ieee.std_logic_arith.