代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/164302/10118917
vhd cnt10.vhd
library ieee;--十进制计数器
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt10 is
port(clk: in std_logic;--时钟信号
clr: in std_logic;--清零信号
ena: in std_logic;--使能信
www.eeworm.com/read/164155/10124870
vhd reg26b.vhd
library ieee;
use ieee.std_logic_1164.all;
entity REG26B is
port(CLK:in std_logic;
DIN:in std_logic_vector(29 downto 0);
DOUT:out std_logic_vector(29 downto 0));
end;
architecture
www.eeworm.com/read/164155/10124964
vhd mzh.vhd
library ieee;
use ieee.std_logic_1164.all;
entity mzh is
port(m5:out std_logic_vector(2 downto 0));
end;
architecture one of mzh is
begin
m5
www.eeworm.com/read/164155/10125310
vhd test.vhd
library ieee;
use ieee.std_logic_1164.all;
entity test is
port(dout:out std_logic_vector(7 downto 0));
end;
architecture one of test is
begin
dout
www.eeworm.com/read/164155/10126013
vhd psk.vhd
library ieee;
use ieee.std_logic_1164.all;
entity psk is
port(code:in std_logic;
q:in std_logic_vector(1 downto 0);
p6b:out std_logic_vector(5 downto 0));
end;
architecture one of p
www.eeworm.com/read/164155/10126302
vhd cnt3.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt3 is
port(clk:in std_logic;
clk10k:out std_logic);
end;
architecture one of cnt3 is
signal q: std_logi
www.eeworm.com/read/164132/10128022
vhd reg32bit.vhd
library ieee;
use ieee.std_logic_1164.all;
entity reg32bit is
port(load:in std_logic;
din:in std_logic_vector(31 downto 0);
dout:out std_logic_vector(31 downto 0));
end reg32bit;
archit
www.eeworm.com/read/164132/10128023
vhd mul16.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity mul16 is
port (clk:in std_logic;
a,b:in std_logic_vector(15 downto 0);
q:ou
www.eeworm.com/read/164131/10128034
vhd decoder_3_8.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity decoder_3_8 is
port(a,b,c,e1,e2,e3:in std_logic;
y:out std_logic_vector(7
www.eeworm.com/read/164131/10128041
vhd rom256x8.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
LIBRARY lpm;
USE lpm.lpm_components.ALL;
LIBRARY work;
USE work.ram_constants.ALL;
ENT