代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/316426/13522970
vhdl sum.vhdl
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for ins
www.eeworm.com/read/316203/13528497
txt adder_variety_style.txt
-- A Variety of Adder Styles
-- download from: www.fpga.com.cn & www.pld.com.cn
------------------------------------------------------------------------
-- Single-bit adder
-----------------------
www.eeworm.com/read/315553/13540908
vhd mc8051_ramx_.vhd
-------------------------------------------------------------------------------
-- --
-- X X XXXXXX XXXX
www.eeworm.com/read/315553/13540914
vhd mc8051_rom_.vhd
-------------------------------------------------------------------------------
-- --
-- X X XXXXXX XXXX
www.eeworm.com/read/314805/13558604
vhdl cpu_16.vhdl
library IEEE;
library UNISIM;
use ieee.std_logic_1164.all;
use UNISIM.VComponents.all;
entity CPU_16 is
port(
clk: in std_logic;
RST: in std_logic;
Dbus: inout std_logic_vector(15 dow
www.eeworm.com/read/313561/13584817
vhd picoblaze_pwm_control.vhd
--
-- Reference design - Pulse Width Modulation (PWM) using PicoBlaze software and
-- interrupts only on the Spartan-3E Starter Kit.
--
-- Ken Chapman - Xilinx Ltd - 22nd May 2
www.eeworm.com/read/312826/13603741
vhd hdb3.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity hdb3 is
port(reset,clk,codein: in std_logic;
codeout: out std_logic_vector(1 downto 0));
end hd
www.eeworm.com/read/312754/13605428
vhd 加法器源程序.vhd
------------------------------------------------------------------------
-- Single-bit adder
------------------------------------------------------------------------
library IEEE;
use IEEE.std_log
www.eeworm.com/read/312754/13605429
txt 加法器描述.txt
-- A Variety of Adder Styles
-- download from: www.fpga.com.cn & www.pld.com.cn
------------------------------------------------------------------------
-- Single-bit adder
-----------------------
www.eeworm.com/read/312754/13605445
vhd 相应加法器的测试向量（test bench).vhd
-- download from: www.pld.com.cn & www.fpga.com.cn
entity testbench is
end;
------------------------------------------------------------------------
-- testbench for 8-bit adder
------------