代码搜索:shift

找到约 10,000 项符合「shift」的源代码

代码结果 10,000
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vhd shift_mid2.vhd

LIBRARY ieee; USE ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all; ENTITY shift_mid2 IS PORT ( clk : in std_logic; indata : in
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vhd shift_register_tb.vhd

--------------------------------------------------------------------------------------------------- -- -- Title : Test Bench for shift_register -- Design : UART -- Author : Xinghua
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jhd shift_register_tb.jhd

MODULE shift_register_tb SUBMODULE shift_register
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m inv_shift_rows.m

function state_out = inv_shift_rows (state_in) %INV_SHIFT_ROWS Cyclically shift (back) the rows of the state matrix. % % STATE_OUT = INV_SHIFT_ROWS (STATE_IN) % cyclically shifts the last th
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vhd shift_logic_gti.vhd

--SINGLE_FILE_TAG ------------------------------------------------------------------------------- -- $Id: shift_logic_gti.vhd,v 1.1 2007/10/12 09:11:36 stefana Exp $ ----------------------------------
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vhd shift_logic_bit.vhd

--SINGLE_FILE_TAG ------------------------------------------------------------------------------- -- $Id: shift_logic_bit.vhd,v 1.1 2007/10/12 09:11:36 stefana Exp $ ----------------------------------
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ncf data_shift_and_out.ncf

# # Constraints generated by Synplify Pro 7.3, Build 170R # # Period Constraints #Begin clock constraints #End clock constraints # Output Constraints # Input Constraints # Location Con
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plg sel_infull_shift.plg

@P: sel_in_shift Part : xc95144pq100-7 @P: sel_in_shift I/O primitives : 37 @P: sel_in_shift I/O Register bits : 0 @P: sel_in_shift Register bits (Non I/O) : 34
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plg data_shift_and_out.plg

@P: datashift Part : xc95144pq100-7 @P: datashift I/O primitives : 40 @P: datashift I/O Register bits : 0 @P: datashift Register bits (Non I/O) : 33
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plg cmd_shift_enable.plg

@P: jtag Part : xc95144pq100-7 @P: jtag I/O primitives : 2 @P: jtag I/O Register bits : 0 @P: jtag Register bits (Non I/O) : 4