代码搜索:opcode

找到约 2,963 项符合「opcode」的源代码

代码结果 2,963
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h opcode.h

#ifndef __Opcodes_H__ #define __Opcodes_H__ // This enumeration defines the set of opcodes that the interpreter // understands. The code generator needs to use this enumeration to generate //
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h opcode.h

#ifndef __Opcodes_H__ #define __Opcodes_H__ // This enumeration defines the set of opcodes that the interpreter // understands. The code generator needs to use this enumeration to generate //
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h opcode.h

/* * Copyright (C) 2004 Internet Systems Consortium, Inc. ("ISC") * Copyright (C) 2002 Internet Software Consortium. * * Permission to use, copy, modify, and distribute this software for any *
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java opcode.java

/* * Copyright (c) 1996-1999 Bill Venners. All Rights Reserved. * * This Java source file is part of the Interactive Illustrations Web * Site, which is delivered in the applets directory of the CD-ROM
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d opcode.d

#name: s390 opcode #objdump: -drw .*: +file format .* Disassembly of section .text: .* : 0: 5a 65 af ff [ ]*a %r6,4095\(%r5,%r10\) 4: 6a 65 af ff [ ]*ad %f6,4095\(%r5,%r10\) 8: ed 6
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s opcode.s

.text foo: a %r6,4095(%r5,%r10) ad %f6,4095(%r5,%r10) adb %f6,4095(%r5,%r10) adbr %f6,%f9 adr %f6,%f9 ae %f6,4095(%r5,%r10) aeb %f6,4095(%r5,%r10) aebr %f6,%f9 aer %f6,%f9 ah %r6,4095(%r5,%r
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d opcode.d

#objdump: -d --prefix-addresses --show-raw-insn #name: MSP430 basic instructions .*: +file format .*msp.* Disassembly of section .text: 0+000 ]*> 1b f3 and #1, r11 ;r3 As==01 0+002 ]*
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s opcode.s

.arch msp430x123 .text .p2align 1,0 .global foo foo: and #1, r11 inv r10 xor #0x00ff, r11 bis #8, r12 bit #0x10, r13 bic #0xa0, r14 cmp #0, r15 sub #1, r10 subc #0, r11 add #1, r12 add
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d opcode.d

#as: -J #objdump: -dw #name: i386 intel .*: +file format .* Disassembly of section .text: 0+000 : 0: 00 90 90 90 90 90 [ ]*add %dl,0x90909090\(%eax\) 6: 01 90 90 90 90 90 [ ]*add
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s opcode.s

.text foo: add %dl,0x90909090(%eax) add %edx,0x90909090(%eax) add 0x90909090(%eax),%dl add 0x90909090(%eax),%edx add $0x90,%al add $0x90909090,%eax push %es pop %es or