代码搜索:normal

找到约 10,000 项符合「normal」的源代码

代码结果 10,000
www.eeworm.com/read/141294/13023973

eqn counter.map.eqn

--mod1[3] is mod1[3] --operation mode is normal mod1[3]_lut_out = A1L1 & counter_clear & A1L82 & !A1L72; mod1[3] = DFFE(mod1[3]_lut_out, clk, , , ); --mod1[2] is mod1[2] --operation mode is
www.eeworm.com/read/141294/13024083

eqn counter.fit.eqn

--mod1[3] is mod1[3] at LC4_6_I1 --operation mode is normal mod1[3]_lut_out = counter_clear & A1L82 & A1L1 & !A1L72; mod1[3] = DFFE(mod1[3]_lut_out, GLOBAL(clk), , , ); --mod1[2] is mod1[2]
www.eeworm.com/read/141289/13024622

eqn control.map.eqn

--p_state[3] is p_state[3] --operation mode is normal p_state[3]_lut_out = A1L3 # A1L71 & p_state[3] # !A1L71 & !num_re; p_state[3] = DFFE(p_state[3]_lut_out, clk, !A1L72, , ); --p_state[1]
www.eeworm.com/read/140725/13064876

opj spartan3_ddr1.opj

(ExpressProject "" (ProjectVersion "19981106") (ProjectType "PCB") (Folder "Design Resources" (Folder "Library") (File ".\spartan3_ddr1.dsn" (Type "Schematic Design")) (
www.eeworm.com/read/327479/13075948

cpp mystatusbar.cpp

// msg.cpp : implementation of the CMyStatusBar class // // This is a part of the Microsoft Foundation Classes C++ library. // Copyright (C) 1992-1995 Microsoft Corporation // All rights reserved.
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eqn ps2tolcd.fit.eqn

-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any o
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eqn ps2tolcd.map.eqn

-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any o
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eqn cnt60.fit.eqn

-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any o
www.eeworm.com/read/137918/13279661

eqn mcs_51.fit.eqn

--B1_LATCH_ADDRES[6] is mcs_51:inst|LATCH_ADDRES[6] at LC3_C4 --operation mode is normal B1_LATCH_ADDRES[6]_lut_out = A1L14; B1_LATCH_ADDRES[6] = DFFEA(B1_LATCH_ADDRES[6]_lut_out, !GLOBAL(ALE), ,
www.eeworm.com/read/137912/13279974

eqn key_scan.map.eqn

--D1_dataout1[7] is FPGA_S51_0:inst5|dataout1[7] --operation mode is normal D1_dataout1[7]_lut_out = p7; D1_dataout1[7] = DFFEA(D1_dataout1[7]_lut_out, WR, , , D1L64, , ); --D1_dataout1[6] i