代码搜索：modelSim
找到约 1,834 项符合「modelSim」的源代码
代码结果 1,834
www.eeworm.com/read/292145/8374940
transcript
# Reading C:/Mentor/Modeltech_6.0a/tcl/vsim/pref.tcl
# // ModelSim SE 6.0a Sep 24 2004
# //
# // Copyright Mentor Graphics Corporation 2004
# // All Rights Reserved.
# //
# //
www.eeworm.com/read/292145/8375000
gfl projnav.gfl
# XST (Creating Lso File) :
KeypadScan.lso
# xst flow : RunXST
KeypadScan.syr
KeypadScan.prj
KeypadScan.sprj
KeypadScan.ana
KeypadScan.stx
KeypadScan.cmd_log
KeypadScan.ngc
KeypadScan.ngr
www.eeworm.com/read/182650/9198042
mti adder_ahead8bit.cr.mti
{D:/modelsim 5.8/examples/adder_ahead8bit/adder_ahead8bit.v} {1 {vlog -work work {D:/modelsim 5.8/examples/adder_ahead8bit/adder_ahead8bit.v}
Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 J
www.eeworm.com/read/177213/9464785
gfl clk_div3.gfl
# XST (Creating Lso File) :
clk_div3.lso
# xst flow : RunXST
clk_div3.syr
clk_div3.prj
clk_div3.sprj
clk_div3.ana
clk_div3.stx
clk_div3.cmd_log
# XST (Creating Lso File) :
clk_div3.lso
#
www.eeworm.com/read/170129/9818113
gfl lab2.gfl
# ProjNav -> New -> Test Bench
__projnav/createTB.err
# ModelSim : Simulate Behavioral VHDL Model
addsub_addsubtest_vhd_tb.fdo
# ModelSim : Simulate Behavioral VHDL Model
vsim.wlf
# ModelSim : S
www.eeworm.com/read/169299/9868346
vhdsim_par dq024.vhdsim_par
dq024.vhdsim_par -- generated only for ProjNav status tracking
Simulation Model Target: Modelsim_VHDL
www.eeworm.com/read/169299/9868746
vhdsim_par mdecode.vhdsim_par
mdecode.vhdsim_par -- generated only for ProjNav status tracking
Simulation Model Target: Modelsim_VHDL
www.eeworm.com/read/169299/9868759
vhdsim_par sel4_1.vhdsim_par
sel4_1.vhdsim_par -- generated only for ProjNav status tracking
Simulation Model Target: Modelsim_VHDL
www.eeworm.com/read/169299/9869008
vhdsim_par top.vhdsim_par
top.vhdsim_par -- generated only for ProjNav status tracking
Simulation Model Target: Modelsim_VHDL