代码搜索：implicit
找到约 5,250 项符合「implicit」的源代码
代码结果 5,250
www.eeworm.com/read/489686/6468791
v addac.v
//Implicit style addition by bit serial
//copyright 1997 Mark Arnold
//all rights reserved
//need to use following for simulation with VeriWell
`define CLK @(posedge sysclk)
`define ENS #1
//need to
www.eeworm.com/read/486304/6539176
f90 predict.f90
subroutine predict( Nmin, Nmax, Ubins, Umin, Uwidth, Nham, &
MaxMol, UN_HIST, BETA, ZETA )
implicit none
integer, intent(in) :: Nmin, Nmax, Ubins, Nham, MaxMol
real, intent(in)
www.eeworm.com/read/484555/6579682
c voronoi.c
#
#include "defs.h"
/* implicit parameters: nsites, sqrt_nsites, xmin, xmax, ymin, ymax,
deltax, deltay (can all be estimates).
Performance suffers if they are wrong; better to make nsites,
www.eeworm.com/read/476406/6760763
f90 simpson.f90
module INTEGRAL
implicit none
real, parameter :: PI=3.14159
contains
! 产生数列
subroutine GenerateData(datas, width, func)
real datas(:), width
real, external :: func
real r
integer
www.eeworm.com/read/476406/6760822
f90 game.f90
module GAME
use SGL
use utility
implicit none
integer, parameter :: SX = 210, SY = 430
integer, parameter :: BoundX = 5, BoundY = 15
integer, parameter :: BatRadius = 8, BallRadius =
www.eeworm.com/read/476406/6760910
f90 ex0905.f90
program ex0905
implicit none
character(len=79) :: filename
character(len=79) :: buffer
integer, parameter :: fileid = 10
integer :: status = 0
logical alive
write(*,*) "Filena
www.eeworm.com/read/409260/11338512
f90 simpson.f90
module INTEGRAL
implicit none
real, parameter :: PI=3.14159
contains
! 产生数列
subroutine GenerateData(datas, width, func)
real datas(:), width
real, external :: func
real r
integer
www.eeworm.com/read/409260/11338612
f90 game.f90
module GAME
use SGL
use utility
implicit none
integer, parameter :: SX = 210, SY = 430
integer, parameter :: BoundX = 5, BoundY = 15
integer, parameter :: BatRadius = 8, BallRadius =
www.eeworm.com/read/409260/11338817
f90 ex0905.f90
program ex0905
implicit none
character(len=79) :: filename
character(len=79) :: buffer
integer, parameter :: fileid = 10
integer :: status = 0
logical alive
write(*,*) "Filena
www.eeworm.com/read/401301/11559711
v addac.v
//Implicit style addition by bit serial
//copyright 1997 Mark Arnold
//all rights reserved
//need to use following for simulation with VeriWell
`define CLK @(posedge sysclk)
`define ENS #1
//need to