代码搜索：dataflow
找到约 215 项符合「dataflow」的源代码
代码结果 215
www.eeworm.com/read/159030/5588788
s copyprop.s
! SPARC assembly: ! Automatically generated by ASM.SPARCGenerator
.section ".data"
.GLOBALFIELD:
.ARRAY_OUT_OF_BOUND:
.asciz "testcases/dataflow/copyprop.dcf:%d: runtime error: array out of
www.eeworm.com/read/159030/5588780
s algebra.s
! SPARC assembly: ! Automatically generated by ASM.SPARCGenerator
.section ".data"
.GLOBALFIELD:
.ARRAY_OUT_OF_BOUND:
.asciz "testcases/dataflow/algebra.dcf:%d: runtime error: array out of b
www.eeworm.com/read/159030/5588785
s cf.s
! SPARC assembly: ! Automatically generated by ASM.SPARCGenerator
.section ".data"
.GLOBALFIELD:
.ARRAY_OUT_OF_BOUND:
.asciz "testcases/dataflow/cf.dcf:%d: runtime error: array out of bound;
www.eeworm.com/read/290095/8505617
vhd fulladder.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY FullAdder IS
PORT(dataA,dataB,carryin:IN STD_LOGIC;
sum,carryout:OUT STD_LOGIC);
END ENTITY FullAdder;
ARCHITECTURE dataflow OF FullAdder I
www.eeworm.com/read/298837/7931814
vhd fulladder.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY FullAdder IS
PORT(dataA,dataB,carryin:IN STD_LOGIC;
sum,carryout:OUT STD_LOGIC);
END ENTITY FullAdder;
ARCHITECTURE dataflow OF FullAdder I
www.eeworm.com/read/177351/5328457
s tronical.s
/*
2006-05-21: vex r1619 finally causes the x86->IR front end to state
exactly the %eflags dataflow surrounding 'cmpb $0, ... ; js ..'
and so memcheck no longer gives a false positive on this test.
www.eeworm.com/read/139427/13156688
vhd chapter1_models.vhd
entity TWO_CONSECUTIVE is
port(CLK,R,X: in BIT;Z: out BIT);
end TWO_CONSECUTIVE;
architecture DATAFLOW of TWO_CONSECUTIVE is
signal Y1,Y0: BIT;
begin
STATE: block((CLK = '1'and not CLK
www.eeworm.com/read/149929/12332378
vhd two_consecutive.vhd
entity TWO_CONSECUTIVE is
port(CLK,R,X: in BIT;Z: out BIT);
end TWO_CONSECUTIVE;
architecture DATAFLOW of TWO_CONSECUTIVE is
signal Y1,Y0: BIT;
begin
STATE: block((CLK = '1'and not C
www.eeworm.com/read/275196/4179564
makefile
include ../../Config.tmpl
PARSER = cardconstraint.tab.o\
cardconstraint.o
DFOBJECTS = bidirectionaldataflow.o\
dataflow.o\
dataprocess.o\
datastore.o\
dfchecks.o\
dfdiagram.o\
dfedge.o\
dfgr
www.eeworm.com/read/366431/2890685
vhd two_consecutive.vhd
entity TWO_CONSECUTIVE is
port(CLK,R,X: in BIT;Z: out BIT);
end TWO_CONSECUTIVE;
architecture DATAFLOW of TWO_CONSECUTIVE is
signal Y1,Y0: BIT;
begin
STATE: block((CLK = '1'and not C