代码搜索:dataIn

找到约 2,888 项符合「dataIn」的源代码

代码结果 2,888
www.eeworm.com/read/419416/10869322

twr fifo12bit_2k.twr

-------------------------------------------------------------------------------- Release 7.1i Trace H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. D:/Xilinx/bin/nt/trce.exe -ise
www.eeworm.com/read/419161/10882965

hier_info a.hier_info

|a clk => q~reg0.CLK d => q~reg0.DATAIN clr => comb~0.IN0 pset => comb~0.IN1 pset => q~reg0.PRESET q
www.eeworm.com/read/271446/10996195

c coms_sencor.c

#include "I2C.h" EX_INTERRUPT_HANDLER(DMA0_PPI_ISR); void Init_EBIU(void); void Init_CPLD(void); void Init_PLL(void); void Init_SDRAM(void); void Init_PPI(void); void Init_DMA(void);
www.eeworm.com/read/469758/6926366

hier_info test.hier_info

|test sw1[7] => led1[7].DATAIN sw1[6] => led1[6].DATAIN sw1[5] => led1[5].DATAIN sw1[4] => led1[4].DATAIN sw1[3] => led1[3].DATAIN sw1[2] => led1[2].DATAIN sw1[1] => led1[1].DATAIN sw1[0] => l
www.eeworm.com/read/328107/7153565

hier_info dds.hier_info

|dds K[0] => SUM99:U0.K[0] K[1] => SUM99:U0.K[1] K[2] => SUM99:U0.K[2] K[3] => SUM99:U0.K[3] K[4] => SUM99:U0.K[4] K[5] => SUM99:U0.K[5] K[6] => SUM99:U0.K[6] K[7] => SUM99:U0.K[7] K[8] => SU
www.eeworm.com/read/462742/7196810

hier_info dds.hier_info

|dds k[0] => sum32:u0.k[0] k[1] => sum32:u0.k[1] k[2] => sum32:u0.k[2] k[3] => sum32:u0.k[3] k[4] => sum32:u0.k[4] k[5] => sum32:u0.k[5] k[6] => sum32:u0.k[6] k[7] => sum32:u0.k[7] k[8] => su
www.eeworm.com/read/459978/7259819

vhd segmain.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity segmain is PORT( clk : IN STD_LOGIC; rst : IN STD_LOGIC; datain : IN STD_LOGIC_VECTOR(15 DO
www.eeworm.com/read/459533/7274209

hier_info wavetimer.hier_info

|wavetimer done baojing:inst1.CLK clk => state_control:inst5.clk clk => miaobiao:inst2.clk clk => inputdata:inst3.clk clear => state_control:inst5.clear start =>
www.eeworm.com/read/458859/7288504

vhd segmain.vhd

library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity segmain is PORT( clk : IN STD_LOGIC; rst : IN STD_LOGIC; datain : IN STD_LOGIC_VECTOR(15 DO
www.eeworm.com/read/456678/7342465

hier_info dds.hier_info

|dds K[0] => SUM99:U0.K[0] K[1] => SUM99:U0.K[1] K[2] => SUM99:U0.K[2] K[3] => SUM99:U0.K[3] K[4] => SUM99:U0.K[4] K[5] => SUM99:U0.K[5] K[6] => SUM99:U0.K[6] K[7] => SUM99:U0.K[7] K[8] => SU