dds.hier_info

基于DD的数字移相正弦信号发生器设计 EDA技术在全国大学生设计竞赛中的应用

|dds
K[0] => SUM99:U0.K[0]
K[1] => SUM99:U0.K[1]
K[2] => SUM99:U0.K[2]
K[3] => SUM99:U0.K[3]
K[4] => SUM99:U0.K[4]
K[5] => SUM99:U0.K[5]
K[6] => SUM99:U0.K[6]
K[7] => SUM99:U0.K[7]
K[8] => SUM99:U0.K[8]
K[9] => SUM99:U0.K[9]
EN => SUM99:U0.EN
RESET => SUM99:U0.RESET
CLK => REG2:U3.CLK
CLK => ROM:U2.CLK
CLK => REG1:U1.CLK
CLK => SUM99:U0.CLK
Q[0] <= REG2:U3.Q[0]
Q[1] <= REG2:U3.Q[1]
Q[2] <= REG2:U3.Q[2]
Q[3] <= REG2:U3.Q[3]
Q[4] <= REG2:U3.Q[4]
Q[5] <= REG2:U3.Q[5]
Q[6] <= REG2:U3.Q[6]
Q[7] <= REG2:U3.Q[7]
Q[8] <= REG2:U3.Q[8]


|dds|SUM99:U0
K[0] => Add0.IN10
K[1] => Add0.IN9
K[2] => Add0.IN8
K[3] => Add0.IN7
K[4] => Add0.IN6
K[5] => Add0.IN5
K[6] => Add0.IN4
K[7] => Add0.IN3
K[8] => Add0.IN2
K[9] => Add0.IN1
CLK => TEMP[0].CLK
CLK => TEMP[1].CLK
CLK => TEMP[2].CLK
CLK => TEMP[3].CLK
CLK => TEMP[4].CLK
CLK => TEMP[5].CLK
CLK => TEMP[6].CLK
CLK => TEMP[7].CLK
CLK => TEMP[8].CLK
CLK => TEMP[9].CLK
EN => TEMP[0].ENA
EN => TEMP[1].ENA
EN => TEMP[2].ENA
EN => TEMP[3].ENA
EN => TEMP[4].ENA
EN => TEMP[5].ENA
EN => TEMP[6].ENA
EN => TEMP[7].ENA
EN => TEMP[8].ENA
EN => TEMP[9].ENA
RESET => TEMP[0].ACLR
RESET => TEMP[1].ACLR
RESET => TEMP[2].ACLR
RESET => TEMP[3].ACLR
RESET => TEMP[4].ACLR
RESET => TEMP[5].ACLR
RESET => TEMP[6].ACLR
RESET => TEMP[7].ACLR
RESET => TEMP[8].ACLR
RESET => TEMP[9].ACLR
OUT1[0] <= TEMP[0].DB_MAX_OUTPUT_PORT_TYPE
OUT1[1] <= TEMP[1].DB_MAX_OUTPUT_PORT_TYPE
OUT1[2] <= TEMP[2].DB_MAX_OUTPUT_PORT_TYPE
OUT1[3] <= TEMP[3].DB_MAX_OUTPUT_PORT_TYPE
OUT1[4] <= TEMP[4].DB_MAX_OUTPUT_PORT_TYPE
OUT1[5] <= TEMP[5].DB_MAX_OUTPUT_PORT_TYPE
OUT1[6] <= TEMP[6].DB_MAX_OUTPUT_PORT_TYPE
OUT1[7] <= TEMP[7].DB_MAX_OUTPUT_PORT_TYPE
OUT1[8] <= TEMP[8].DB_MAX_OUTPUT_PORT_TYPE
OUT1[9] <= TEMP[9].DB_MAX_OUTPUT_PORT_TYPE


|dds|REG1:U1
D[0] => Q[0]~reg0.DATAIN
D[1] => Q[1]~reg0.DATAIN
D[2] => Q[2]~reg0.DATAIN
D[3] => Q[3]~reg0.DATAIN
D[4] => Q[4]~reg0.DATAIN
D[5] => Q[5]~reg0.DATAIN
D[6] => Q[6]~reg0.DATAIN
D[7] => Q[7]~reg0.DATAIN
D[8] => Q[8]~reg0.DATAIN
D[9] => Q[9]~reg0.DATAIN
CLK => Q[0]~reg0.CLK
CLK => Q[1]~reg0.CLK
CLK => Q[2]~reg0.CLK
CLK => Q[3]~reg0.CLK
CLK => Q[4]~reg0.CLK
CLK => Q[5]~reg0.CLK
CLK => Q[6]~reg0.CLK
CLK => Q[7]~reg0.CLK
CLK => Q[8]~reg0.CLK
CLK => Q[9]~reg0.CLK
Q[0] <= Q[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= Q[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= Q[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= Q[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[4] <= Q[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[5] <= Q[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[6] <= Q[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[7] <= Q[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[8] <= Q[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[9] <= Q[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|dds|ROM:U2
ADDR[0] => Equal0.IN9
ADDR[0] => Equal1.IN9
ADDR[0] => Equal2.IN8
ADDR[0] => Equal3.IN9
ADDR[0] => Equal4.IN8
ADDR[0] => Equal5.IN9
ADDR[0] => Equal6.IN7
ADDR[0] => Equal7.IN9
ADDR[0] => Equal8.IN8
ADDR[0] => Equal9.IN9
ADDR[0] => Equal10.IN7
ADDR[0] => Equal11.IN9
ADDR[0] => Equal12.IN2
ADDR[0] => Equal13.IN9
ADDR[0] => Equal14.IN2
ADDR[0] => Equal15.IN9
ADDR[0] => Equal16.IN1
ADDR[0] => Equal17.IN9
ADDR[0] => Equal18.IN3
ADDR[0] => Equal19.IN9
ADDR[0] => Equal20.IN2
ADDR[0] => Equal21.IN9
ADDR[0] => Equal22.IN2
ADDR[0] => Equal23.IN9
ADDR[0] => Equal24.IN1
ADDR[0] => Equal25.IN9
ADDR[0] => Equal26.IN2
ADDR[0] => Equal27.IN9
ADDR[0] => Equal28.IN1
ADDR[0] => Equal29.IN9
ADDR[0] => Equal30.IN1
ADDR[0] => Equal31.IN9
ADDR[0] => Equal32.IN0
ADDR[0] => Equal33.IN9
ADDR[1] => Equal0.IN8
ADDR[1] => Equal1.IN8
ADDR[1] => Equal2.IN9
ADDR[1] => Equal3.IN8
ADDR[1] => Equal4.IN7
ADDR[1] => Equal5.IN7
ADDR[1] => Equal6.IN9
ADDR[1] => Equal7.IN8
ADDR[1] => Equal8.IN7
ADDR[1] => Equal9.IN7
ADDR[1] => Equal10.IN9
ADDR[1] => Equal11.IN2
ADDR[1] => Equal12.IN9
ADDR[1] => Equal13.IN8
ADDR[1] => Equal14.IN1
ADDR[1] => Equal15.IN1
ADDR[1] => Equal16.IN9
ADDR[1] => Equal17.IN8
ADDR[1] => Equal18.IN2
ADDR[1] => Equal19.IN2
ADDR[1] => Equal20.IN9
ADDR[1] => Equal21.IN8
ADDR[1] => Equal22.IN1
ADDR[1] => Equal23.IN1
ADDR[1] => Equal24.IN9
ADDR[1] => Equal25.IN8
ADDR[1] => Equal26.IN1
ADDR[1] => Equal27.IN1
ADDR[1] => Equal28.IN9
ADDR[1] => Equal29.IN8
ADDR[1] => Equal30.IN0
ADDR[1] => Equal31.IN0
ADDR[1] => Equal32.IN9
ADDR[1] => Equal33.IN8
ADDR[2] => Equal0.IN7
ADDR[2] => Equal1.IN7
ADDR[2] => Equal2.IN7
ADDR[2] => Equal3.IN7
ADDR[2] => Equal4.IN9
ADDR[2] => Equal5.IN8
ADDR[2] => Equal6.IN8
ADDR[2] => Equal7.IN7
ADDR[2] => Equal8.IN6
ADDR[2] => Equal9.IN6
ADDR[2] => Equal10.IN6
ADDR[2] => Equal11.IN1
ADDR[2] => Equal12.IN1
ADDR[2] => Equal13.IN1
ADDR[2] => Equal14.IN9
ADDR[2] => Equal15.IN8
ADDR[2] => Equal16.IN8
ADDR[2] => Equal17.IN7
ADDR[2] => Equal18.IN1
ADDR[2] => Equal19.IN1
ADDR[2] => Equal20.IN1
ADDR[2] => Equal21.IN1
ADDR[2] => Equal22.IN9
ADDR[2] => Equal23.IN8
ADDR[2] => Equal24.IN8
ADDR[2] => Equal25.IN7
ADDR[2] => Equal26.IN0
ADDR[2] => Equal27.IN0
ADDR[2] => Equal28.IN0
ADDR[2] => Equal29.IN0
ADDR[2] => Equal30.IN9
ADDR[2] => Equal31.IN8
ADDR[2] => Equal32.IN8
ADDR[2] => Equal33.IN7
ADDR[3] => Equal0.IN6
ADDR[3] => Equal1.IN6
ADDR[3] => Equal2.IN6
ADDR[3] => Equal3.IN6
ADDR[3] => Equal4.IN6
ADDR[3] => Equal5.IN6
ADDR[3] => Equal6.IN6
ADDR[3] => Equal7.IN6
ADDR[3] => Equal8.IN9
ADDR[3] => Equal9.IN8
ADDR[3] => Equal10.IN8
ADDR[3] => Equal11.IN8
ADDR[3] => Equal12.IN8
ADDR[3] => Equal13.IN7
ADDR[3] => Equal14.IN8
ADDR[3] => Equal15.IN7
ADDR[3] => Equal16.IN7
ADDR[3] => Equal17.IN6
ADDR[3] => Equal18.IN0
ADDR[3] => Equal19.IN0
ADDR[3] => Equal20.IN0
ADDR[3] => Equal21.IN0
ADDR[3] => Equal22.IN0
ADDR[3] => Equal23.IN0
ADDR[3] => Equal24.IN0
ADDR[3] => Equal25.IN0
ADDR[3] => Equal26.IN9
ADDR[3] => Equal27.IN8
ADDR[3] => Equal28.IN8
ADDR[3] => Equal29.IN7
ADDR[3] => Equal30.IN8
ADDR[3] => Equal31.IN7
ADDR[3] => Equal32.IN7
ADDR[3] => Equal33.IN6
ADDR[4] => Equal0.IN5
ADDR[4] => Equal1.IN5
ADDR[4] => Equal2.IN5
ADDR[4] => Equal3.IN5
ADDR[4] => Equal4.IN5
ADDR[4] => Equal5.IN5
ADDR[4] => Equal6.IN5
ADDR[4] => Equal7.IN5
ADDR[4] => Equal8.IN5
ADDR[4] => Equal9.IN5
ADDR[4] => Equal10.IN5
ADDR[4] => Equal11.IN0
ADDR[4] => Equal12.IN0
ADDR[4] => Equal13.IN0
ADDR[4] => Equal14.IN0
ADDR[4] => Equal15.IN0
ADDR[4] => Equal16.IN0
ADDR[4] => Equal17.IN0
ADDR[4] => Equal18.IN9
ADDR[4] => Equal19.IN8
ADDR[4] => Equal20.IN8
ADDR[4] => Equal21.IN7
ADDR[4] => Equal22.IN8
ADDR[4] => Equal23.IN7
ADDR[4] => Equal24.IN7
ADDR[4] => Equal25.IN6
ADDR[4] => Equal26.IN8
ADDR[4] => Equal27.IN7
ADDR[4] => Equal28.IN7
ADDR[4] => Equal29.IN6
ADDR[4] => Equal30.IN7
ADDR[4] => Equal31.IN6
ADDR[4] => Equal32.IN6
ADDR[4] => Equal33.IN5
ADDR[5] => Equal0.IN4
ADDR[5] => Equal1.IN4
ADDR[5] => Equal2.IN4
ADDR[5] => Equal3.IN4
ADDR[5] => Equal4.IN4
ADDR[5] => Equal5.IN4
ADDR[5] => Equal6.IN4
ADDR[5] => Equal7.IN4
ADDR[5] => Equal8.IN4
ADDR[5] => Equal9.IN4
ADDR[5] => Equal10.IN4
ADDR[5] => Equal11.IN7
ADDR[5] => Equal12.IN7
ADDR[5] => Equal13.IN6
ADDR[5] => Equal14.IN7
ADDR[5] => Equal15.IN6
ADDR[5] => Equal16.IN6
ADDR[5] => Equal17.IN5
ADDR[5] => Equal18.IN8
ADDR[5] => Equal19.IN7
ADDR[5] => Equal20.IN7
ADDR[5] => Equal21.IN6
ADDR[5] => Equal22.IN7
ADDR[5] => Equal23.IN6
ADDR[5] => Equal24.IN6
ADDR[5] => Equal25.IN5
ADDR[5] => Equal26.IN7
ADDR[5] => Equal27.IN6
ADDR[5] => Equal28.IN6
ADDR[5] => Equal29.IN5
ADDR[5] => Equal30.IN6
ADDR[5] => Equal31.IN5
ADDR[5] => Equal32.IN5
ADDR[5] => Equal33.IN4
ADDR[6] => Equal0.IN3
ADDR[6] => Equal1.IN3
ADDR[6] => Equal2.IN3
ADDR[6] => Equal3.IN3
ADDR[6] => Equal4.IN3
ADDR[6] => Equal5.IN3
ADDR[6] => Equal6.IN3
ADDR[6] => Equal7.IN3
ADDR[6] => Equal8.IN3
ADDR[6] => Equal9.IN3
ADDR[6] => Equal10.IN3
ADDR[6] => Equal11.IN6
ADDR[6] => Equal12.IN6
ADDR[6] => Equal13.IN5
ADDR[6] => Equal14.IN6
ADDR[6] => Equal15.IN5
ADDR[6] => Equal16.IN5
ADDR[6] => Equal17.IN4
ADDR[6] => Equal18.IN7
ADDR[6] => Equal19.IN6
ADDR[6] => Equal20.IN6
ADDR[6] => Equal21.IN5
ADDR[6] => Equal22.IN6
ADDR[6] => Equal23.IN5
ADDR[6] => Equal24.IN5
ADDR[6] => Equal25.IN4
ADDR[6] => Equal26.IN6
ADDR[6] => Equal27.IN5
ADDR[6] => Equal28.IN5
ADDR[6] => Equal29.IN4
ADDR[6] => Equal30.IN5
ADDR[6] => Equal31.IN4
ADDR[6] => Equal32.IN4
ADDR[6] => Equal33.IN3
ADDR[7] => Equal0.IN2
ADDR[7] => Equal1.IN2
ADDR[7] => Equal2.IN2
ADDR[7] => Equal3.IN2
ADDR[7] => Equal4.IN2
ADDR[7] => Equal5.IN2
ADDR[7] => Equal6.IN2
ADDR[7] => Equal7.IN2
ADDR[7] => Equal8.IN2
ADDR[7] => Equal9.IN2
ADDR[7] => Equal10.IN2
ADDR[7] => Equal11.IN5
ADDR[7] => Equal12.IN5
ADDR[7] => Equal13.IN4
ADDR[7] => Equal14.IN5
ADDR[7] => Equal15.IN4
ADDR[7] => Equal16.IN4
ADDR[7] => Equal17.IN3
ADDR[7] => Equal18.IN6
ADDR[7] => Equal19.IN5
ADDR[7] => Equal20.IN5
ADDR[7] => Equal21.IN4
ADDR[7] => Equal22.IN5
ADDR[7] => Equal23.IN4
ADDR[7] => Equal24.IN4
ADDR[7] => Equal25.IN3
ADDR[7] => Equal26.IN5
ADDR[7] => Equal27.IN4
ADDR[7] => Equal28.IN4
ADDR[7] => Equal29.IN3
ADDR[7] => Equal30.IN4
ADDR[7] => Equal31.IN3
ADDR[7] => Equal32.IN3
ADDR[7] => Equal33.IN2
ADDR[8] => Equal0.IN1
ADDR[8] => Equal1.IN1
ADDR[8] => Equal2.IN1
ADDR[8] => Equal3.IN1
ADDR[8] => Equal4.IN1
ADDR[8] => Equal5.IN1
ADDR[8] => Equal6.IN1
ADDR[8] => Equal7.IN1
ADDR[8] => Equal8.IN1
ADDR[8] => Equal9.IN1
ADDR[8] => Equal10.IN1
ADDR[8] => Equal11.IN4
ADDR[8] => Equal12.IN4
ADDR[8] => Equal13.IN3
ADDR[8] => Equal14.IN4
ADDR[8] => Equal15.IN3
ADDR[8] => Equal16.IN3
ADDR[8] => Equal17.IN2
ADDR[8] => Equal18.IN5
ADDR[8] => Equal19.IN4
ADDR[8] => Equal20.IN4
ADDR[8] => Equal21.IN3
ADDR[8] => Equal22.IN4
ADDR[8] => Equal23.IN3
ADDR[8] => Equal24.IN3
ADDR[8] => Equal25.IN2
ADDR[8] => Equal26.IN4
ADDR[8] => Equal27.IN3
ADDR[8] => Equal28.IN3
ADDR[8] => Equal29.IN2
ADDR[8] => Equal30.IN3
ADDR[8] => Equal31.IN2
ADDR[8] => Equal32.IN2
ADDR[8] => Equal33.IN1
ADDR[9] => Equal0.IN0
ADDR[9] => Equal1.IN0
ADDR[9] => Equal2.IN0
ADDR[9] => Equal3.IN0
ADDR[9] => Equal4.IN0
ADDR[9] => Equal5.IN0
ADDR[9] => Equal6.IN0
ADDR[9] => Equal7.IN0
ADDR[9] => Equal8.IN0
ADDR[9] => Equal9.IN0
ADDR[9] => Equal10.IN0
ADDR[9] => Equal11.IN3
ADDR[9] => Equal12.IN3
ADDR[9] => Equal13.IN2
ADDR[9] => Equal14.IN3
ADDR[9] => Equal15.IN2
ADDR[9] => Equal16.IN2
ADDR[9] => Equal17.IN1
ADDR[9] => Equal18.IN4
ADDR[9] => Equal19.IN3
ADDR[9] => Equal20.IN3
ADDR[9] => Equal21.IN2
ADDR[9] => Equal22.IN3
ADDR[9] => Equal23.IN2
ADDR[9] => Equal24.IN2
ADDR[9] => Equal25.IN1
ADDR[9] => Equal26.IN3
ADDR[9] => Equal27.IN2
ADDR[9] => Equal28.IN2
ADDR[9] => Equal29.IN1
ADDR[9] => Equal30.IN2
ADDR[9] => Equal31.IN1
ADDR[9] => Equal32.IN1
ADDR[9] => Equal33.IN0
CLK => OUTP[0]~reg0.CLK
CLK => OUTP[1]~reg0.CLK
CLK => OUTP[2]~reg0.CLK
CLK => OUTP[3]~reg0.CLK
CLK => OUTP[4]~reg0.CLK
CLK => OUTP[5]~reg0.CLK
CLK => OUTP[6]~reg0.CLK
CLK => OUTP[7]~reg0.CLK
CLK => OUTP[8]~reg0.CLK
OUTP[0] <= OUTP[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[1] <= OUTP[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[2] <= OUTP[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[3] <= OUTP[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[4] <= OUTP[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[5] <= OUTP[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[6] <= OUTP[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[7] <= OUTP[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
OUTP[8] <= OUTP[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|dds|REG2:U3
D[0] => Q[0]~reg0.DATAIN
D[1] => Q[1]~reg0.DATAIN
D[2] => Q[2]~reg0.DATAIN
D[3] => Q[3]~reg0.DATAIN
D[4] => Q[4]~reg0.DATAIN
D[5] => Q[5]~reg0.DATAIN
D[6] => Q[6]~reg0.DATAIN
D[7] => Q[7]~reg0.DATAIN
D[8] => Q[8]~reg0.DATAIN
CLK => Q[0]~reg0.CLK
CLK => Q[1]~reg0.CLK
CLK => Q[2]~reg0.CLK
CLK => Q[3]~reg0.CLK
CLK => Q[4]~reg0.CLK
CLK => Q[5]~reg0.CLK
CLK => Q[6]~reg0.CLK
CLK => Q[7]~reg0.CLK
CLK => Q[8]~reg0.CLK
Q[0] <= Q[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[1] <= Q[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[2] <= Q[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[3] <= Q[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[4] <= Q[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[5] <= Q[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[6] <= Q[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[7] <= Q[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
Q[8] <= Q[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE