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找到约 3,833 项符合「bench」的源代码

代码结果 3,833
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/308751/13693591

ant top_tbw.ant

// E:\FPGA_PROGRAM\ISE6.1\TST // Verilog Annotation Test Bench created by // HDL Bencher 6.1i // Thu May 24 09:33:28 2007 `timescale 1ns/1ns `define F_ASSERT 2 `define s4 4 `define F_IDLE 1
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www.eeworm.com/read/308751/13693612

ant arm.ant

// E:\ISE6.1\TST // Verilog Annotation Test Bench created by // HDL Bencher 6.1i // Sun May 06 09:28:57 2007 `timescale 1ns/1ns `define F_ASSERT 2 `define s3 3 `define N 5 `define IF1 2 `
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www.eeworm.com/read/308751/13693619

ant armtst_tbw.ant

// E:\ISE6.1\TST // Verilog Annotation Test Bench created by // HDL Bencher 6.1i // Fri Apr 27 09:33:14 2007 `timescale 1ns/1ns `define C_WRITE 4 `define C_L_MODE 0 `define C_P_CHRG 2 `def
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www.eeworm.com/read/308751/13693833

ant ding_tbw.ant

// E:\ISE6.1\TST // Verilog Annotation Test Bench created by // HDL Bencher 6.1i // Sun May 06 16:32:39 2007 `timescale 1ns/1ns `define s0 0 `define F_ASSERT 2 `define OD 4 `define s4 4 `
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www.eeworm.com/read/297137/3889684

entries

/Makefile/1.12/Tue Aug 14 14:31:47 2001// /bench.volmap/1.9/Wed May 30 16:04:29 2001// /lat_fs.c/1.14/Thu May 24 04:38:07 2001// /test.imgmap.i486/1.11/Sat May 26 18:15:41 2001// D
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www.eeworm.com/read/297137/3889726

entries

/Makefile/1.12/Tue Aug 14 14:31:47 2001// /bench.volmap/1.10/Wed May 30 16:04:29 2001// /lat_heap.c/1.15/Thu May 24 04:38:07 2001// /test.imgmap.i486/1.12/Sat May 26 18:15:41 2001// D
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www.eeworm.com/read/297137/3889781

entries

/Makefile/1.12/Tue Aug 14 14:31:48 2001// /bench.volmap/1.9/Wed May 30 16:04:29 2001// /lat_rngkey.c/1.10/Wed Oct 13 22:50:45 1999// /test.imgmap.i486/1.9/Sat May 26 18:15:41 2001// D
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www.eeworm.com/read/383392/8950682

txt notes.txt

Units' hierarchy: bench pic_core_sim fadr_mux pic_alu pic_ctrl pic_rom pic_time reg_8rst reg_8t reg_cons reg_file reg_fsr reg_inst reg_io reg_pc
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www.eeworm.com/read/308751/13693561

ant counter_tbw.ant

// E:\ISE6.1\TST // Verilog Annotation Test Bench created by // HDL Bencher 6.1i // Thu Apr 26 20:53:30 2007 `timescale 1ns/1ns `define s3 3 `define s2 2 `define C_READ 5 `define C_WRITE 4
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www.eeworm.com/read/486439/1251559

entries

/bench.vcd/1.1/Sat Jun 15 07:37:05 2002// /ncverilog.key/1.1/Sat Jun 15 07:37:11 2002// /ncverilog.log/1.1/Sat Jun 15 07:37:11 2002// /run/1.1/Sat Jun 15 07:37:11 2002// D/INCA_libs//// D/waves////
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