代码搜索：adder4
找到约 194 项符合「adder4」的源代码
代码结果 194
www.eeworm.com/read/235873/14048689
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/132791/14072873
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/203569/15355690
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/201721/15398286
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/200854/15421850
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/109800/15548206
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/109799/15548355
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/481338/6652783
v adder16.v
module adder16(A,B,Cin,Cout,Sum);
input[15:0]A,B;
input Cin;
output Cout;
output[15:0]Sum;
wire wire1;
wire wire2;
wire wire3;
wire[
www.eeworm.com/read/119738/14823321
vhd add4.vhd
-- This VHDL Source Have been create with WITHCLASS95
-- Scrip file written by Clerbois M
use WORK.WCLASSPKG.ALL; -- Definition
package ADDER4PKG is
COMPONENT ADDER4
PORT (
--
www.eeworm.com/read/252132/12300532
vhd adder4.vhd
LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
ENTITY adder4 IS
PORT ( Cin : IN STD_LOGIC ;
x3, x2, x1, x0 : IN STD_LOGIC ;
y3, y2, y1, y0 : IN STD_LOGIC ;
s3, s2, s1, s0 : OU