代码搜索：adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/244290/12874610
fit h_adder.fit
-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 10/04/2007 18:24:25
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and
www.eeworm.com/read/244290/12874614
hif h_adder.hif
HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, an
www.eeworm.com/read/244290/12874619
vhd h_adder.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY H_ADDER IS
PORT(A,B:IN STD_LOGIC;CO,SO:OUT STD_LOGIC);
END ENTITY H_ADDER;
ARCHITECTURE ART2 OF H_ADDER IS
BEGIN
SO
www.eeworm.com/read/244290/12874621
rpt h_adder.rpt
Project Information g:\llp\h_adder\h_adder.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 10/04/2007 18:24:25
Copyright (C) 1988-2002 Al
www.eeworm.com/read/327630/13069661
vhd adder32.vhd
-- megafunction wizard: %LPM_ADD_SUB%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: lpm_add_sub
-- ============================================================
-- File Name: adder32.vhd
www.eeworm.com/read/327630/13069667
cmp adder8.cmp
--Copyright (C) 1991-2004 Altera Corporation
--Any megafunction design, and related netlist (encrypted or decrypted),
--support information, device programming or simulation file, and any oth
www.eeworm.com/read/327630/13069699
vhd adder8.vhd
-- megafunction wizard: %LPM_ADD_SUB%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: lpm_add_sub
-- ============================================================
-- File Name: adder8.vhd
www.eeworm.com/read/327630/13070192
cmp adder32.cmp
--Copyright (C) 1991-2004 Altera Corporation
--Any megafunction design, and related netlist (encrypted or decrypted),
--support information, device programming or simulation file, and any oth
www.eeworm.com/read/326522/13136710
xco aa_adder.xco
# BEGIN Project Options
SET flowvendor = Foundation_iSE
SET vhdlsim = True
SET verilogsim = True
SET workingdirectory = D:\work\ISE\c11
SET speedgrade = -12
SET simulationfiles = Behavioral
SET asysym
www.eeworm.com/read/139685/13139951
txt adder_vhd.txt
------------------------------------------------------------------------
-- Single-bit adder
------------------------------------------------------------------------
library IEEE;
use IEEE.std_log