代码搜索：adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/299127/7886663
v full_adder.v
module full_adder(ina,inb,carry_in,sum_out,carry_out);
input ina;
input inb;
input carry_in;
output sum_out;
output carry_out;
//reg sum_out;
//reg
www.eeworm.com/read/299127/7886684
v half_adder.v
module half_adder(ina,inb,sum_out,carry_out,clk,rst);
input ina;
input inb;
input clk;
input rst;
output sum_out;
output carry_out;
reg sum_out;
reg
www.eeworm.com/read/399128/7887211
v fb_adder.v
// megafunction wizard: %LPM_ADD_SUB%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: lpm_add_sub
// ============================================================
// File Name: fb_adder.v
www.eeworm.com/read/433436/7930220
v adder4.v
//
// adder4.v
//
// ac51 microcontroller core
//
// Version 0.6
//
// Copyright 2008, Hideyuki Abe. All rights reserved.
// Distributed under the terms of the MIT License.
//
module adder
www.eeworm.com/read/297875/7990840
v adder16.v
`include "adder.v"
module adder16(cout,sum,a,b,cin);
output cout;
parameter my_size=16;
output[my_size-1:0] sum;
input[my_size-1:0] a,b;
input cin;
adder my_adder(cout,sum,a,b,cin);
endmod
www.eeworm.com/read/297875/7991018
v adder8.v
module adder8(cout,sum,ina,inb,cin,clk);
output[7:0] sum;
output cout;
input[7:0] ina,inb;
input cin,clk;
reg[7:0] tempa,tempb,sum;
reg cout;
reg tempc;
always @(posedge clk)
begin
tempa=i
www.eeworm.com/read/297875/7991061
acf adder4.acf
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
www.eeworm.com/read/297875/7991065
v adder4.v
module adder4(cout,sum,ina,inb,cin);
output[3:0] sum;
output cout;
input[3:0] ina,inb;
input cin;
assign {cout,sum}=ina+inb+cin;
endmodule
www.eeworm.com/read/297875/7991070
ndb adder4.ndb
NDB006
The number of symbol table entries is: 1
The length of the symbol table is: 2
Index Hierarchy Path
----- --------------
! |
The number of name info structs is : 1
InsOrder BitField
www.eeworm.com/read/297875/7991071
v adder_tp.v
`timescale 1ns/1ns
`include "adder4.v"
module adder_tp;
reg[3:0] a,b;
reg cin;
wire[3:0] sum;
wire cout;
integer i,j;
adder4 adder(sum,cout,a,b,cin);
always #5 cin=~cin;
initial
begin