代码搜索：adder
找到约 6,792 项符合「adder」的源代码
代码结果 6,792
www.eeworm.com/read/286957/8734430
cpp random.cpp
#include "stdafx.h"
#include "Random.h"
#include
const unsigned long m_maxshort=65536L;
const unsigned long m_multiplier=1194211693L;
const unsigned long m_adder=12345L;
//产生种子
v
www.eeworm.com/read/17540/737548
cpld
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity adder4bit is
port(cin:in std_logic;
a,b:in std_logic_vector(3 downto 0);
s:out std_logic_vector(3 downto
www.eeworm.com/read/17540/737559
cpld
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity adder8bit is
port(cin:in std_logic;
a,b:in std_logic_vector(7 downto 0);
s:out std_logic_vector(7 downto
www.eeworm.com/read/453029/1645382
bld add.bld
Release 7.1.04i ngdbuild H.42
Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.
Command Line: ngdbuild -intstyle ise -dd e:\temp\spartan2\vhdl\basic\adder/_ngo
-nt timestamp -uc add.ucf -p
www.eeworm.com/read/338629/3314580
tcl addere_alt.tcl
project -new
add_file -vhdl -lib work ../AdderE.vhd
add_file -vhdl -lib work ../Full_Adder.vhd
add_file -constraints AdderE.sdc
set_option -top_module AdderE
set_option -technology CYCLONE
set_o
www.eeworm.com/read/471796/6882000
vhd list_ch03_19_fp.vhd
-- Listing 3.19
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity fp_adder is
port (
sign1, sign2: in std_logic;
exp1, exp2: in std_logic_vector(3 dow
www.eeworm.com/read/248071/12603587
v test.v
module adder4 (in1, in2, sum, zero);
parameter WORD = 32 ;
parameter MEMSIZE = 16 ;
input [WORD-1:0] in1, in2;
inout [11:3] busl;
output [15:0] out;
/*af*/
initial begin
sum=0;
zero=sum;
sum=in1+in
www.eeworm.com/read/453698/7414107
vhd cnt.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cnt is
port(clk:in std_logic;
datak1:in std_logic_vector(7 downto 0);
adder1:out std_logic_vector(7 downto 0