代码搜索：adder
找到约 6,792 项符合「adder」的源代码
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www.eeworm.com/read/312645/3656700
changelog
2002-11-25 Gary Thomas
* src/adder_flash.c:
* cdl/flash_adder.cdl: New package - platform specific support
for Analogue & Micro Adder (PowerPC 850) boards.
//==
www.eeworm.com/read/398200/2387467
changelog
2002-11-25 Gary Thomas
* src/adder_flash.c:
* cdl/flash_adder.cdl: New package - platform specific support
for Analogue & Micro Adder (PowerPC 850) boards.
//========
www.eeworm.com/read/189192/8485957
vhd addsub.vhd
--
-- This is the adder-subtractor vhdl module.
-- this code implements a simple and compact
-- adder-subtractor.
--
-- Input(s): a, b, subtract
-- Output(s): sum
--
-- include these three
www.eeworm.com/read/386702/8731050
vhd cheng4.vhd
LIBRARY IEEE ;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
entity cheng4 is
port(
cin : IN STD_LOGIC;
a : IN STD
www.eeworm.com/read/383870/8913435
vhd sha1_32add.vhd
------------------------------------------------------------------------
--
-- Single-bit adder
--
------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_
www.eeworm.com/read/381044/9113785
vhd dds_dds.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
ENTITY dds_dds IS
port(ftw: in std_logic_vector(23 downto 0); --频率控制字
clk: in
www.eeworm.com/read/376462/9316847
fit alu.fit
-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 10/31/2015 15:20:48
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and
www.eeworm.com/read/374530/9400196
vhd dds_dds.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;
ENTITY dds_dds IS
port(ftw: in std_logic_vector(23 downto 0); --频率控制字
clk: in