代码搜索：Voltage Regulation

找到约 5,122 项符合「Voltage Regulation」的源代码

代码结果 5,122
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/302408/13836210

cdb voltage.eco.cdb

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www.eeworm.com/read/302408/13836215

hier_info voltage.hier_info

|voltage clk => \clk_8khz:n[31].CLK clk => \clk_8khz:n[30].CLK clk => \clk_8khz:n[29].CLK clk => \clk_8khz:n[28].CLK clk => \clk_8khz:n[27].CLK clk => \clk_8khz:n[26].CLK clk => \clk_8khz:n[25]
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www.eeworm.com/read/302408/13836221

hdb voltage.map.hdb

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www.eeworm.com/read/302408/13836224

hdb voltage.sgdiff.hdb

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www.eeworm.com/read/302408/13836225

rpt voltage.fit.rpt

Fitter report for voltage Fri Oct 27 22:05:59 2006 Version 5.0 Build 148 04/26/2005 SJ Full Version --------------------- ; Table of Contents ; --------------------- 1. Legal Notice 2.
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www.eeworm.com/read/302408/13836233

eqn voltage.fit.eqn

-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any o
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bdf voltage2.bdf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
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www.eeworm.com/read/488735/6485070

vhd voltage_measure.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity voltage_measure is port(clk :in std_logic; rst:in std_logic; dat_input
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www.eeworm.com/read/484832/6575546

gdf voltage2.gdf

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www.eeworm.com/read/484832/6575549

pof voltage2.pof

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