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Verilog 的代码
can_registers.prj
verilog work can_register_asyn_syn.v
verilog work can_register_asyn.v
verilog work can_register.v
verilog work can_registers.v
counter.gfl
# Verilog : PDCL (jhdparse)
__projnav/counter_jhdparse_tcl.rsp
# Verilog : View Verilog Instantiation Template
automake.err
ProjNav -> New -> Test Fixture
automake.err
# Verilog : PDCL (jhdparse
counter.gfl
# Verilog : PDCL (jhdparse)
__projnav/counter_jhdparse_tcl.rsp
# Verilog : View Verilog Instantiation Template
automake.err
ProjNav -> New -> Test Fixture
automake.err
# Verilog : PDCL (jhdparse
counter.gfl
# Verilog : PDCL (jhdparse)
__projnav/counter_jhdparse_tcl.rsp
# Verilog : View Verilog Instantiation Template
automake.err
ProjNav -> New -> Test Fixture
automake.err
# Verilog : PDCL (jhdparse
freque.prj
verilog work "hc_led.v"
verilog work "clk200hz.v"
verilog work "freque.v"
fpga_40rs232.prj
verilog work serial.v
verilog work diag.v
verilog work fpga_40XRS232.v
fpga_40rs232.prj
verilog work serial.v
verilog work diag.v
verilog work fpga_40XRS232.v
system.prj
1 verilog work ../rtl/ddr_clkgen.v
2 verilog work ../rtl/ddr_pulse78.v
3 verilog work ../rtl/ddr_ctrl.v
4 verilog work ../rtl/ddr_init.v
5 verilog work ../rtl/ddr_rpath.v
6 verilog work ../rtl/dd
eexywave_bencher.prj
verilog work D:/Xilinx/verilog/src/glbl.v
gwwave_bencher.prj
verilog work D:/Xilinx/verilog/src/glbl.v