counter.gfl

FPGA/CPLD集成开发环境ISE的使用详解 示例代码1

# Verilog : PDCL (jhdparse)
__projnav/counter_jhdparse_tcl.rsp
# Verilog : View Verilog Instantiation Template
automake.err
ProjNav -> New -> Test Fixture
automake.err
# Verilog : PDCL (jhdparse)
__projnav/counter_tst_Fix_jhdparse_tcl.rsp
# ProjNav -> New Source -> TBW
__projnav\hb_cmds
# xst flow : RunXST
counter.syr
counter.ngr
counter.prj
counter.sprj
counter.ana
counter.stx
counter.cmd_log
counter.ngc
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
j:\project_navigator_demo\counter/_ngo
counter.ngd
counter_ngdbuild.nav
counter.bld
.untf
counter.cmd_log
# Implementation : Map
counter.nc1
counter.mrp
counter.pcf
counter.ngm
counter_map.ngm
counter.mdf
counter_map.ncd
__projnav/map.log
counter.cmd_log
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
counter.twr
counter.twx
counter.tsi
counter.cmd_log
# Implmentation : Generate Post-Place & Route Static Timing
__projnav/nc1TOncd_tcl.rsp
counter.ncd
counter.par
counter.pad
counter.dly
counter.xpi
counter.grf
counter.itr
counter_last_par.ncd
__projnav/par.log
counter.cmd_log
# Generate Programming File
__projnav/counter_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
counter.ut
# Generate Programming File
counter.bgn
counter.rbt
counter.ll
counter.msk
counter.drc
counter.nky
counter.bit
counter.bin
counter.isc
counter.cmd_log
# f2g Migration
_impact.cmd
_impact.log
counter.ngr
# XST (Creating Lso File) : 
counter.lso
# xst flow : RunXST
counter.syr
counter.prj
counter.sprj
counter.ana
counter.stx
counter.cmd_log
counter.ngc
counter.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
d:\cd\example-2-1\project_navigator_demo\counter/_ngo
counter.ngd
counter_ngdbuild.nav
counter.bld
.untf
counter.cmd_log
# Implementation : Map
counter_map.ncd
counter.ngm
counter.pcf
counter.nc1
counter.mrp
counter_map.mrp
counter.mdf
__projnav/map.log
counter.cmd_log
MAP_NO_GUIDE_FILE_CPF "counter"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
counter.twr
counter.twx
counter.tsi
counter.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
counter.ncd
counter.par
counter.pad
counter_pad.txt
counter_pad.csv
counter.pad_txt
counter.dly
reportgen.log
counter.xpi
counter.grf
counter.itr
counter_last_par.ncd
__projnav/par.log
counter.placed_ncd_tracker
counter.routed_ncd_tracker
counter.cmd_log
PAR_NO_GUIDE_FILE_CPF "counter"
# Implementation : View/Edit Routed Design (FPGA Editor)
counter_map_fpga_editor.log
counter_fpga_editor.out
counter_fpga_editor.log
__projnav/pfea_tcl.rsp
# XST (Creating Lso File) : 
counter.lso
# xst flow : RunXST
counter.syr
counter.prj
counter.sprj
counter.ana
counter.stx
counter.cmd_log
counter.ngc
counter.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
c:\workstation\ise第二版2004-05-13\cd\example-2-1\project_navigator_demo\counter/_ngo
counter.ngd
counter_ngdbuild.nav
counter.bld
.untf
counter.cmd_log
# Implementation : Map
counter_map.ncd
counter.ngm
counter.pcf
counter.nc1
counter.mrp
counter_map.mrp
counter.mdf
__projnav/map.log
counter.cmd_log
MAP_NO_GUIDE_FILE_CPF "counter"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
counter.twr
counter.twx
counter.tsi
counter.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
counter.ncd
counter.par
counter.pad
counter_pad.txt
counter_pad.csv
counter.pad_txt
counter.dly
reportgen.log
counter.xpi
counter.grf
counter.itr
counter_last_par.ncd
__projnav/par.log
counter.placed_ncd_tracker
counter.routed_ncd_tracker
counter.cmd_log
PAR_NO_GUIDE_FILE_CPF "counter"
# Generate Programming File
__projnav/counter_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
counter.ut
# Generate Programming File
counter.bgn
counter.rbt
counter.ll
counter.msk
counter.drc
counter.nky
counter.bit
counter.bin
counter.isc
counter.cmd_log