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找到约 19,564 项符合
Verilog 的代码
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity decode8 is
port(
o : out vl_logic;
a0 : in vl_logic;
a1 : in vl_logic;
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity ibufg_pci66_3 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity obuf_lvcmos18_f_12 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity ofdxi_u is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity fdcpe_1 is
generic(
cds_action : string := "ignore";
init : integer := 0
);
port(
q
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity ibufgds_lvds_25 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity ilflxi_1m is
generic(
cds_action : string := "ignore";
init : integer := 1
);
port(
q
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity fdpe is
generic(
cds_action : string := "ignore";
init : integer := 1
);
port(
q :
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity cy4_42 is
generic(
cds_action : string := "ignore"
);
port(
c0 : out vl_logic;
c1
_primary.vhd
library verilog;
use verilog.vl_types.all;
entity and4 is
generic(
cds_action : string := "ignore"
);
port(
o : out vl_logic;
i0