代码搜索：Verilog
找到约 10,000 项符合「Verilog」的源代码
代码结果 10,000
www.eeworm.com/read/414310/2151438
make_verilog
verilog \
../../../bench/verilog/oc8051_tb.v \
../../../bench/verilog/oc8051_xram.v \
../../../bench/verilog/oc8051_uart_test.v \
../../../bench/verilog/oc8051_xrom.v \
../../../rtl/ve
www.eeworm.com/read/403510/2311296
java verilog.java
/* -*- tab-width: 4 -*-
*
* Electric(tm) VLSI Design System
*
* File: Verilog.java
* Input/output tool: Verilog Netlist output
* Written by Steven M. Rubin, Sun Microsystems.
*
* Copyright (c)
www.eeworm.com/read/402216/2327241
txt verilog.txt
Primary keywords and identifiers
Secondary keywords and identifiers
System Tasks
User defined tasks and identifiers
Unused
www.eeworm.com/read/402216/2327308
txt verilog.txt
DOCUMENT_DEFAULT = 0
COMMENT = 1
COMMENTLINE = 2
COMMENTLINEBANG = 3
NUMBER = 4
WORD = 5
STRING = 6
WORD2 = 7
WORD3 = 8
PREPROCESSOR = 9
OPERATOR = 10
IDENTIFIER = 11
STRI
www.eeworm.com/read/475608/6774278
asm verilog.asm
www.eeworm.com/read/198746/6786433
psm verilog.psm
www.eeworm.com/read/198746/6786436
psm verilog.psm
www.eeworm.com/read/198746/6786439
psm verilog.psm
www.eeworm.com/read/474148/6815653
asm verilog.asm
www.eeworm.com/read/474148/6815656